arm64: dts: renesas: s4sk: Access rswitch ports via phandles

The r8a779f0.dtsi now contains labels for each rswitch port in the form
'rswitch_portN'.  Use those to access rswitch ports and slightly reduce
the depth of this board DT.  No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250118111344.361617-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts b/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts
index 5d71d52f9c654783a4cc944b1ece42bf55f353c8..a4167dd955aeff3feec2c8405dada53a5eb1327b 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts
+++ b/arch/arm64/boot/dts/renesas/r8a779f4-s4sk.dts
@@ -179,53 +179,48 @@
        pinctrl-0 = <&tsn0_pins>, <&tsn1_pins>;
        pinctrl-names = "default";
        status = "okay";
+};
+
+&rswitch_port0 {
+       reg = <0>;
+       phy-handle = <&ic99>;
+       phy-mode = "sgmii";
+       phys = <&eth_serdes 0>;
 
-       ethernet-ports {
+       mdio {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               port@0 {
-                       reg = <0>;
-                       phy-handle = <&ic99>;
-                       phy-mode = "sgmii";
-                       phys = <&eth_serdes 0>;
-
-                       mdio {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               ic99: ethernet-phy@1 {
-                                       reg = <1>;
-                                       compatible = "ethernet-phy-ieee802.3-c45";
-                                       interrupts-extended = <&gpio3 10 IRQ_TYPE_LEVEL_LOW>;
-                               };
-                       };
-               };
-
-               port@1 {
+               ic99: ethernet-phy@1 {
                        reg = <1>;
-                       phy-handle = <&ic102>;
-                       phy-mode = "sgmii";
-                       phys = <&eth_serdes 1>;
-
-                       mdio {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               ic102: ethernet-phy@2 {
-                                       reg = <2>;
-                                       compatible = "ethernet-phy-ieee802.3-c45";
-                                       interrupts-extended = <&gpio3 11 IRQ_TYPE_LEVEL_LOW>;
-                               };
-                       };
+                       compatible = "ethernet-phy-ieee802.3-c45";
+                       interrupts-extended = <&gpio3 10 IRQ_TYPE_LEVEL_LOW>;
                };
+       };
+};
 
-               port@2 {
-                       status = "disabled";
+&rswitch_port1 {
+       reg = <1>;
+       phy-handle = <&ic102>;
+       phy-mode = "sgmii";
+       phys = <&eth_serdes 1>;
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ic102: ethernet-phy@2 {
+                       reg = <2>;
+                       compatible = "ethernet-phy-ieee802.3-c45";
+                       interrupts-extended = <&gpio3 11 IRQ_TYPE_LEVEL_LOW>;
                };
        };
 };
 
+&rswitch_port2 {
+       status = "disabled";
+};
+
 &rwdt {
        timeout-sec = <60>;
        status = "okay";