__diag_ignore_all("-Woverride-init", "Allow field initialization overrides for display info");
struct platform_desc {
+ enum intel_display_platform platform;
+ const char *name;
const struct intel_display_device_info *info; /* NULL for GMD ID */
};
+#define PLATFORM(_platform) \
+ .platform = (INTEL_DISPLAY_##_platform), \
+ .name = #_platform
+
static const struct intel_display_device_info no_display = {};
#define PIPE_A_OFFSET 0x70000
.__runtime_defaults.cpu_transcoder_mask = BIT(TRANSCODER_A)
static const struct platform_desc i830_desc = {
+ PLATFORM(I830),
.info = &(const struct intel_display_device_info) {
I830_DISPLAY,
};
static const struct platform_desc i845_desc = {
+ PLATFORM(I845G),
.info = &(const struct intel_display_device_info) {
I845_DISPLAY,
};
static const struct platform_desc i85x_desc = {
+ PLATFORM(I85X),
.info = &(const struct intel_display_device_info) {
I830_DISPLAY,
};
static const struct platform_desc i865g_desc = {
+ PLATFORM(I865G),
.info = &(const struct intel_display_device_info) {
I845_DISPLAY,
.__runtime_defaults.port_mask = BIT(PORT_B) | BIT(PORT_C) /* SDVO B/C */
static const struct platform_desc i915g_desc = {
+ PLATFORM(I915G),
.info = &(const struct intel_display_device_info) {
GEN3_DISPLAY,
I845_COLORS,
};
static const struct platform_desc i915gm_desc = {
+ PLATFORM(I915GM),
.info = &(const struct intel_display_device_info) {
GEN3_DISPLAY,
I9XX_COLORS,
};
static const struct platform_desc i945g_desc = {
+ PLATFORM(I945G),
.info = &(const struct intel_display_device_info) {
GEN3_DISPLAY,
I845_COLORS,
};
static const struct platform_desc i945gm_desc = {
+ PLATFORM(I915GM),
.info = &(const struct intel_display_device_info) {
GEN3_DISPLAY,
I9XX_COLORS,
};
static const struct platform_desc g33_desc = {
+ PLATFORM(G33),
.info = &(const struct intel_display_device_info) {
GEN3_DISPLAY,
I845_COLORS,
};
static const struct platform_desc pnv_desc = {
+ PLATFORM(PINEVIEW),
.info = &(const struct intel_display_device_info) {
GEN3_DISPLAY,
I9XX_COLORS,
BIT(TRANSCODER_A) | BIT(TRANSCODER_B)
static const struct platform_desc i965g_desc = {
+ PLATFORM(I965G),
.info = &(const struct intel_display_device_info) {
GEN4_DISPLAY,
.has_overlay = 1,
};
static const struct platform_desc i965gm_desc = {
+ PLATFORM(I965GM),
.info = &(const struct intel_display_device_info) {
GEN4_DISPLAY,
.has_overlay = 1,
};
static const struct platform_desc g45_desc = {
+ PLATFORM(G45),
.info = &(const struct intel_display_device_info) {
GEN4_DISPLAY,
};
static const struct platform_desc gm45_desc = {
+ PLATFORM(GM45),
.info = &(const struct intel_display_device_info) {
GEN4_DISPLAY,
.supports_tv = 1,
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | BIT(PORT_D) /* DP A, SDVO/HDMI/DP B, HDMI/DP C/D */
static const struct platform_desc ilk_d_desc = {
+ PLATFORM(IRONLAKE),
.info = &(const struct intel_display_device_info) {
ILK_DISPLAY,
},
};
static const struct platform_desc ilk_m_desc = {
+ PLATFORM(IRONLAKE),
.info = &(const struct intel_display_device_info) {
ILK_DISPLAY,
};
static const struct platform_desc snb_desc = {
+ PLATFORM(SANDYBRIDGE),
.info = &(const struct intel_display_device_info) {
.has_hotplug = 1,
I9XX_PIPE_OFFSETS,
};
static const struct platform_desc ivb_desc = {
+ PLATFORM(IVYBRIDGE),
.info = &(const struct intel_display_device_info) {
.has_hotplug = 1,
IVB_PIPE_OFFSETS,
};
static const struct platform_desc vlv_desc = {
+ PLATFORM(VALLEYVIEW),
.info = &(const struct intel_display_device_info) {
.has_gmch = 1,
.has_hotplug = 1,
};
static const struct platform_desc hsw_desc = {
+ PLATFORM(HASWELL),
.info = &(const struct intel_display_device_info) {
.has_ddi = 1,
.has_dp_mst = 1,
};
static const struct platform_desc bdw_desc = {
+ PLATFORM(BROADWELL),
.info = &(const struct intel_display_device_info) {
.has_ddi = 1,
.has_dp_mst = 1,
};
static const struct platform_desc chv_desc = {
+ PLATFORM(CHERRYVIEW),
.info = &(const struct intel_display_device_info) {
.has_hotplug = 1,
.has_gmch = 1,
};
static const struct platform_desc skl_desc = {
+ PLATFORM(SKYLAKE),
.info = &skl_display,
};
static const struct platform_desc kbl_desc = {
+ PLATFORM(KABYLAKE),
.info = &skl_display,
};
static const struct platform_desc cfl_desc = {
+ PLATFORM(COFFEELAKE),
.info = &skl_display,
};
static const struct platform_desc cml_desc = {
+ PLATFORM(COMETLAKE),
.info = &skl_display,
};
.__runtime_defaults.port_mask = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C)
static const struct platform_desc bxt_desc = {
+ PLATFORM(BROXTON),
.info = &(const struct intel_display_device_info) {
GEN9_LP_DISPLAY,
.dbuf.size = 512 - 4, /* 4 blocks for bypass path allocation */
};
static const struct platform_desc glk_desc = {
+ PLATFORM(GEMINILAKE),
.info = &(const struct intel_display_device_info) {
GEN9_LP_DISPLAY,
.dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A)
static const struct platform_desc icl_desc = {
+ PLATFORM(ICELAKE),
.info = &(const struct intel_display_device_info) {
ICL_DISPLAY,
};
static const struct platform_desc jsl_desc = {
+ PLATFORM(JASPERLAKE),
.info = &jsl_ehl_display,
};
static const struct platform_desc ehl_desc = {
+ PLATFORM(ELKHARTLAKE),
.info = &jsl_ehl_display,
};
.__runtime_defaults.fbc_mask = BIT(INTEL_FBC_A)
static const struct platform_desc tgl_desc = {
+ PLATFORM(TIGERLAKE),
.info = &(const struct intel_display_device_info) {
XE_D_DISPLAY,
};
static const struct platform_desc dg1_desc = {
+ PLATFORM(DG1),
.info = &(const struct intel_display_device_info) {
XE_D_DISPLAY,
};
static const struct platform_desc rkl_desc = {
+ PLATFORM(ROCKETLAKE),
.info = &(const struct intel_display_device_info) {
XE_D_DISPLAY,
.abox_mask = BIT(0),
};
static const struct platform_desc adl_s_desc = {
+ PLATFORM(ALDERLAKE_S),
.info = &(const struct intel_display_device_info) {
XE_D_DISPLAY,
.has_hti = 1,
};
static const struct platform_desc adl_p_desc = {
+ PLATFORM(ALDERLAKE_P),
.info = &xe_lpd_display,
};
};
static const struct platform_desc dg2_desc = {
+ PLATFORM(DG2),
.info = &xe_hpd_display,
};
* reported by the hardware.
*/
static const struct platform_desc mtl_desc = {
+ PLATFORM(METEORLAKE),
};
static const struct platform_desc lnl_desc = {
+ PLATFORM(LUNARLAKE),
};
__diag_pop();
&DISPLAY_INFO(i915)->__runtime_defaults,
sizeof(*DISPLAY_RUNTIME_INFO(i915)));
+ drm_WARN_ON(&i915->drm, !desc->platform || !desc->name);
+ DISPLAY_RUNTIME_INFO(i915)->platform = desc->platform;
+
if (ip_ver.ver || ip_ver.rel || ip_ver.step)
DISPLAY_RUNTIME_INFO(i915)->ip = ip_ver;
struct drm_i915_private;
struct drm_printer;
+/* Keep in gen based order, and chronological order within a gen */
+enum intel_display_platform {
+ INTEL_DISPLAY_PLATFORM_UNINITIALIZED = 0,
+ /* Display ver 2 */
+ INTEL_DISPLAY_I830,
+ INTEL_DISPLAY_I845G,
+ INTEL_DISPLAY_I85X,
+ INTEL_DISPLAY_I865G,
+ /* Display ver 3 */
+ INTEL_DISPLAY_I915G,
+ INTEL_DISPLAY_I915GM,
+ INTEL_DISPLAY_I945G,
+ INTEL_DISPLAY_I945GM,
+ INTEL_DISPLAY_G33,
+ INTEL_DISPLAY_PINEVIEW,
+ /* Display ver 4 */
+ INTEL_DISPLAY_I965G,
+ INTEL_DISPLAY_I965GM,
+ INTEL_DISPLAY_G45,
+ INTEL_DISPLAY_GM45,
+ /* Display ver 5 */
+ INTEL_DISPLAY_IRONLAKE,
+ /* Display ver 6 */
+ INTEL_DISPLAY_SANDYBRIDGE,
+ /* Display ver 7 */
+ INTEL_DISPLAY_IVYBRIDGE,
+ INTEL_DISPLAY_VALLEYVIEW,
+ INTEL_DISPLAY_HASWELL,
+ /* Display ver 8 */
+ INTEL_DISPLAY_BROADWELL,
+ INTEL_DISPLAY_CHERRYVIEW,
+ /* Display ver 9 */
+ INTEL_DISPLAY_SKYLAKE,
+ INTEL_DISPLAY_BROXTON,
+ INTEL_DISPLAY_KABYLAKE,
+ INTEL_DISPLAY_GEMINILAKE,
+ INTEL_DISPLAY_COFFEELAKE,
+ INTEL_DISPLAY_COMETLAKE,
+ /* Display ver 11 */
+ INTEL_DISPLAY_ICELAKE,
+ INTEL_DISPLAY_JASPERLAKE,
+ INTEL_DISPLAY_ELKHARTLAKE,
+ /* Display ver 12 */
+ INTEL_DISPLAY_TIGERLAKE,
+ INTEL_DISPLAY_ROCKETLAKE,
+ INTEL_DISPLAY_DG1,
+ INTEL_DISPLAY_ALDERLAKE_S,
+ /* Display ver 13 */
+ INTEL_DISPLAY_ALDERLAKE_P,
+ INTEL_DISPLAY_DG2,
+ /* Display ver 14 (based on GMD ID) */
+ INTEL_DISPLAY_METEORLAKE,
+ /* Display ver 20 (based on GMD ID) */
+ INTEL_DISPLAY_LUNARLAKE,
+};
+
#define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \
/* Keep in alphabetical order */ \
func(cursor_needs_physical); \
(DISPLAY_VER(i915) >= (from) && DISPLAY_VER(i915) <= (until))
struct intel_display_runtime_info {
+ enum intel_display_platform platform;
+
struct intel_display_ip_ver {
u16 ver;
u16 rel;