]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: cix: Enable PCIe on the Orion O6 board
authorHans Zhang <hans.zhang@cixtech.com>
Sat, 8 Nov 2025 14:03:05 +0000 (22:03 +0800)
committerPeter Chen <peter.chen@cixtech.com>
Mon, 17 Nov 2025 04:49:42 +0000 (12:49 +0800)
Add PCIe RC support on Orion O6 board.

The Orion O6 board includes multiple PCIe root complexes. The current
device tree configuration enables detection and basic operation of PCIe
endpoints on this platform.

GPIO and pinctrl subsystems for this platform are not yet ready for
upstream inclusion. Consequently, attributes such as reset-gpios and
pinctrl configurations are temporarily omitted from the PCIe node
definitions.

Endpoint detection and functionality are confirmed to be operational with
this basic configuration. The missing GPIO and pinctrl support will be
added incrementally in future patches as the dependent subsystems become
available upstream.

Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Hans Zhang <hans.zhang@cixtech.com>
Link: https://lore.kernel.org/r/20251108140305.1120117-11-hans.zhang@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
arch/arm64/boot/dts/cix/sky1-orion-o6.dts

index cdaca197edda499222fb447c4651d279ca1f3a42..4dee8cd0b86dac978589ec329de5eaf5b84d052f 100644 (file)
        };
 };
 
+&pcie_x8_rc {
+       status = "okay";
+};
+
+&pcie_x4_rc {
+       status = "okay";
+};
+
+&pcie_x2_rc {
+       status = "okay";
+};
+
+&pcie_x1_0_rc {
+       status = "okay";
+};
+
+&pcie_x1_1_rc {
+       status = "okay";
+};
+
 &uart2 {
        status = "okay";
 };