3.10-stable patches

added patches:
	staging-comedi-8255_pci-fix-for-newer-pci-dio48h.patch

diff --git a/queue-3.10/series b/queue-3.10/series
index 1ef217b5bc293c2bac53032eef6e6e7cb587ad7a..855699fa386c31671fad09b01552921c67759651 100644 (file)
--- a/queue-3.10/series
+++ b/queue-3.10/series
@@ -3,3 +3,4 @@ ceph-cleanup-aborted-requests-when-re-sending-requests.patch
 ceph-wake-up-safe-waiters-when-unregistering-request.patch
 powerpc-kvm-fix-rare-but-potential-deadlock-scene.patch
 tty-pmac_zilog-check-existence-of-ports-in-pmz_console_init.patch
+staging-comedi-8255_pci-fix-for-newer-pci-dio48h.patch

diff --git a/queue-3.10/staging-comedi-8255_pci-fix-for-newer-pci-dio48h.patch b/queue-3.10/staging-comedi-8255_pci-fix-for-newer-pci-dio48h.patch
new file mode 100644 (file)
index 0000000..0aeea08
--- /dev/null
+++ b/queue-3.10/staging-comedi-8255_pci-fix-for-newer-pci-dio48h.patch
@@ -0,0 +1,75 @@
+From 0283f7a100882684ad32b768f9f1ad81658a0b92 Mon Sep 17 00:00:00 2001
+From: Ian Abbott <abbotti@mev.co.uk>
+Date: Fri, 13 Dec 2013 12:00:30 +0000
+Subject: staging: comedi: 8255_pci: fix for newer PCI-DIO48H
+
+From: Ian Abbott <abbotti@mev.co.uk>
+
+commit 0283f7a100882684ad32b768f9f1ad81658a0b92 upstream.
+
+At some point, Measurement Computing / ComputerBoards redesigned the
+PCI-DIO48H to use a PLX PCI interface chip instead of an AMCC chip.
+This meant they had to put their hardware registers in the PCI BAR 2
+region instead of PCI BAR 1.  Unfortunately, they kept the same PCI
+device ID for the new design.  This means the driver recognizes the
+newer cards, but doesn't work (and is likely to screw up the local
+configuration registers of the PLX chip) because it's using the wrong
+region.
+
+Since  the PCI subvendor and subdevice IDs were both zero on the old
+design, but are the same as the vendor and device on the new design, we
+can tell the old design and new design apart easily enough.  Split the
+existing entry for the PCI-DIO48H in `pci_8255_boards[]` into two new
+entries, referenced by different entries in the PCI device ID table
+`pci_8255_pci_table[]`.  Use the same board name for both entries.
+
+Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
+Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/staging/comedi/drivers/8255_pci.c |   15 ++++++++++++---
+ 1 file changed, 12 insertions(+), 3 deletions(-)
+
+--- a/drivers/staging/comedi/drivers/8255_pci.c
++++ b/drivers/staging/comedi/drivers/8255_pci.c
+@@ -66,7 +66,8 @@ enum pci_8255_boardid {
+       BOARD_ADLINK_PCI7296,
+       BOARD_CB_PCIDIO24,
+       BOARD_CB_PCIDIO24H,
+-      BOARD_CB_PCIDIO48H,
++      BOARD_CB_PCIDIO48H_OLD,
++      BOARD_CB_PCIDIO48H_NEW,
+       BOARD_CB_PCIDIO96H,
+       BOARD_NI_PCIDIO96,
+       BOARD_NI_PCIDIO96B,
+@@ -109,11 +110,16 @@ static const struct pci_8255_boardinfo p
+               .dio_badr       = 2,
+               .n_8255         = 1,
+       },
+-      [BOARD_CB_PCIDIO48H] = {
++      [BOARD_CB_PCIDIO48H_OLD] = {
+               .name           = "cb_pci-dio48h",
+               .dio_badr       = 1,
+               .n_8255         = 2,
+       },
++      [BOARD_CB_PCIDIO48H_NEW] = {
++              .name           = "cb_pci-dio48h",
++              .dio_badr       = 2,
++              .n_8255         = 2,
++      },
+       [BOARD_CB_PCIDIO96H] = {
+               .name           = "cb_pci-dio96h",
+               .dio_badr       = 2,
+@@ -270,7 +276,10 @@ static DEFINE_PCI_DEVICE_TABLE(pci_8255_
+       { PCI_VDEVICE(ADLINK, 0x7296), BOARD_ADLINK_PCI7296 },
+       { PCI_VDEVICE(CB, 0x0028), BOARD_CB_PCIDIO24 },
+       { PCI_VDEVICE(CB, 0x0014), BOARD_CB_PCIDIO24H },
+-      { PCI_VDEVICE(CB, 0x000b), BOARD_CB_PCIDIO48H },
++      { PCI_DEVICE_SUB(PCI_VENDOR_ID_CB, 0x000b, 0x0000, 0x0000),
++        .driver_data = BOARD_CB_PCIDIO48H_OLD },
++      { PCI_DEVICE_SUB(PCI_VENDOR_ID_CB, 0x000b, PCI_VENDOR_ID_CB, 0x000b),
++        .driver_data = BOARD_CB_PCIDIO48H_NEW },
+       { PCI_VDEVICE(CB, 0x0017), BOARD_CB_PCIDIO96H },
+       { PCI_VDEVICE(NI, 0x0160), BOARD_NI_PCIDIO96 },
+       { PCI_VDEVICE(NI, 0x1630), BOARD_NI_PCIDIO96B },