drm/i915/psr: Apply Wa_14015648006 for all display 14 steppings

According to recent Bspec Wa 14015648006 has to be applied for all display
14 steppings.

Bspec: 66624

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230829094435.2100669-1-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 72887c29fb515dff805c57edda5cb06e2bfd3bc7..e5a0522066d5cbbeaa89ff0818001a9c7ec8ebd5 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1360,8 +1360,7 @@ static void wm_optimization_wa(struct intel_dp *intel_dp,
        bool set_wa_bit = false;
 
        /* Wa_14015648006 */
-       if (IS_DISPLAY_IP_STEP(dev_priv, IP_VER(14, 0), STEP_A0, STEP_B0) ||
-           IS_DISPLAY_VER(dev_priv, 11, 13))
+       if (IS_DISPLAY_VER(dev_priv, 11, 14))
                set_wa_bit |= crtc_state->wm_level_disabled;
 
        /* Wa_16013835468 */