ramips: fix Phicomm K2G WAN by enabling rgmii1

The K2G's WAN port is an external RTL8211F gigabit PHY on switch
port 5, reached over the SoC's rgmii1 pins. The device tree only
requests rgmii2_pins though, so nothing ever claims rgmii1 and the
pins keep whatever the bootloader left them as.

When rgmii1 is muxed to GPIO the WAN port comes up but receives
nothing: port 5 RxGPC stays at 0 and wan never gets a DHCP lease.

rgmii1 vs GPIO is GPIOMODE (SYSC + 0x60) bit 9. Requesting
rgmii1_pins makes the pinmux driver clear it, which is enough to
get the WAN RX path working again. The rgmii1 pads (GPIO 24-35)
aren't used for anything else on this board.

Tested on a K2G: WAN gets a DHCP lease and passes traffic.

Signed-off-by: Dixiao-L <stgowl@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/23629
Signed-off-by: Robert Marko <robimarko@gmail.com>

diff --git a/target/linux/ramips/dts/mt7620a_phicomm_k2g.dts b/target/linux/ramips/dts/mt7620a_phicomm_k2g.dts
index bc934d705845e229e7979167994d8ca49b6fedc6..e57db6721b1463dbde902ca4b37212266f54bf64 100644 (file)
--- a/target/linux/ramips/dts/mt7620a_phicomm_k2g.dts
+++ b/target/linux/ramips/dts/mt7620a_phicomm_k2g.dts
@@ -21,7 +21,7 @@
 
 &ethernet {
        pinctrl-names = "default";
-       pinctrl-0 = <&rgmii2_pins &mdio_pins>;
+       pinctrl-0 = <&rgmii1_pins &mdio_pins>;
 
        mediatek,portmap = "llllw";