2002-04-29 Chris Demetriou <cgd@broadcom.com>

        Merge from mainline:
        2002-03-06  Chris Demetriou  <cgd@broadcom.com>
        * mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
        present on I4.

        Merge from mainline:
        2002-03-06  Chris Demetriou  <cgd@broadcom.com>
        * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".

        Merge from mainline:
        2002-03-15  Chris Demetriou  <cgd@broadcom.com>
        * mips-dis.c (is_newabi): Fix ABI decoding.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 1a375086e68f62127e6463342632611e056e0896..17eb4eec958986d0f1ce88b1b181a7ceec1240c0 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,18 @@
+2002-04-29  Chris Demetriou  <cgd@broadcom.com>
+
+       Merge from mainline:
+       2002-03-06  Chris Demetriou  <cgd@broadcom.com>
+       * mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
+       present on I4.
+
+       Merge from mainline:
+       2002-03-06  Chris Demetriou  <cgd@broadcom.com>
+       * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
+
+       Merge from mainline:
+       2002-03-15  Chris Demetriou  <cgd@broadcom.com>
+       * mips-dis.c (is_newabi): Fix ABI decoding.
+
 2002-04-04  Alan Modra  <amodra@bigpond.net.au>
 
        * dep-in.sed: Cope with absolute paths.

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 13eb728fcdee9fb70e6203f44b1333d5c577a461..95f4e52bc440dddd947d253b833cab3a56a0ad02 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -397,10 +397,14 @@ static int
 is_newabi (header)
      Elf_Internal_Ehdr *header;
 {
-  if ((header->e_flags
-       & (E_MIPS_ABI_EABI32 | E_MIPS_ABI_EABI64 | EF_MIPS_ABI2)) != 0
-      || (header->e_ident[EI_CLASS] == ELFCLASS64
-         && (header->e_flags & E_MIPS_ABI_O64) == 0))
+  /* There are no old-style ABIs which use 64-bit ELF.  */
+  if (header->e_ident[EI_CLASS] == ELFCLASS64)
+    return 1;
+
+  /* If a 32-bit ELF file, N32, EABI32, and EABI64 are new-style ABIs.  */
+  if ((header->e_flags & EF_MIPS_ABI2) != 0
+      || (header->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI32
+      || (header->e_flags & EF_MIPS_ABI) == E_MIPS_ABI_EABI64)
     return 1;
 
   return 0;

diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index e2386e886a8bb8a2b70c7a87f3955954338dd3c8..55d7b921a6397f4bd947493458c47b0822c47009 100644 (file)
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -114,7 +114,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
    them first.  The assemblers uses a hash table based on the
    instruction name anyhow.  */
 /* name,    args,      match,      mask,       pinfo,                  membership */
-{"pref",    "k,o(b)",   0xcc000000, 0xfc000000, RD_b,                  I32|G3  },
+{"pref",    "k,o(b)",   0xcc000000, 0xfc000000, RD_b,                  I4|I32|G3       },
 {"prefx",   "h,t(b)",  0x4c00000f, 0xfc0007ff, RD_b|RD_t,              I4      },
 {"nop",     "",         0x00000000, 0xffffffff, 0,                     I1      },
 {"ssnop",   "",         0x00000040, 0xffffffff, 0,                     I32     },
@@ -583,6 +583,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"ffc",     "d,v",     0x0000000b, 0xfc1f07ff, WR_d|RD_s,              L1      },
 {"movn.d",  "D,S,t",    0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I4|I32 },
 {"movn.s",  "D,S,t",    0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S,    I4|I32 },
+{"movn.ps", "D,S,t",    0x46c00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I5     },
 {"movt",    "d,s,N",    0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC,        I4|I32 },
 {"movt.d",  "D,S,N",    0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D,   I4|I32 },
 {"movt.s",  "D,S,N",    0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S,   I4|I32 },
@@ -591,6 +592,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"ffs",     "d,v",     0x0000000a, 0xfc1f07ff, WR_d|RD_s,              L1      },
 {"movz.d",  "D,S,t",    0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I4|I32 },
 {"movz.s",  "D,S,t",    0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S,    I4|I32 },
+{"movz.ps", "D,S,t",    0x46c00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D,    I5     },
 /* move is at the top of the table.  */
 {"msub.d",  "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4    },
 {"msub.s",  "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4    },