drm/amd/display: Update IPS sequential_ono requirement checks

[why & how]
ASICs that require special RCG/PG programming are determined based
on hw_internal_rev. Update these checks to properly include all such
ASICs.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Ovidiu Bunea <Ovidiu.Bunea@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c
index 62b7012cda430417cec46e036592f71b601c37ea..f7a373a3d70a5275078bd32c5bfff884f6aba88e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c
@@ -138,7 +138,7 @@ bool dpp35_construct(
        dpp->base.funcs = &dcn35_dpp_funcs;
 
        // w/a for cursor memory stuck in LS by programming DISPCLK_R_GATE_DISABLE, limit w/a to some ASIC revs
-       if (dpp->base.ctx->asic_id.hw_internal_rev <= 0x10)
+       if (dpp->base.ctx->asic_id.hw_internal_rev < 0x40)
                dpp->dispclk_r_gate_disable = true;
        return ret;
 }

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
index fb91209a06e80f7ac6c0948048ab127b892f4cb4..72c6cf047db06f4c9fc6bf0f9a7308d582a2f6b9 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
@@ -1903,7 +1903,7 @@ static bool dcn35_resource_construct(
        dc->caps.max_disp_clock_khz_at_vmin = 650000;
 
        /* Sequential ONO is based on ASIC. */
-       if (dc->ctx->asic_id.hw_internal_rev > 0x10)
+       if (dc->ctx->asic_id.hw_internal_rev >= 0x40)
                dc->caps.sequential_ono = true;
 
        /* Use pipe context based otg sync logic */

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
index 96c8288fb7fad98119c8e420ff292ac507049bfb..48e1f234185ff96bab0b75469c791d1b2509494e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
@@ -1876,7 +1876,7 @@ static bool dcn36_resource_construct(
        dc->caps.max_disp_clock_khz_at_vmin = 650000;
 
        /* Sequential ONO is based on ASIC. */
-       if (dc->ctx->asic_id.hw_internal_rev > 0x10)
+       if (dc->ctx->asic_id.hw_internal_rev >= 0x40)
                dc->caps.sequential_ono = true;
 
        /* Use pipe context based otg sync logic */