pwm: rcar: Improve calculation of divider

The rcar_pwm_get_clock_division() has a loop to calculate the divider,
but the value of div should be calculatable without a loop. So, this
patch improves it.

This algorithm is suggested by Uwe Kleine-König and Laurent Pinchart.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>

diff --git a/drivers/pwm/pwm-rcar.c b/drivers/pwm/pwm-rcar.c
index 1e13fbb41fd16cbae9171046b38a6452e0a803de..cfe7dd1b448e1b15ce72b41cbaafd7b65703106c 100644 (file)
--- a/drivers/pwm/pwm-rcar.c
+++ b/drivers/pwm/pwm-rcar.c
@@ -8,6 +8,8 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/log2.h>
+#include <linux/math64.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
@@ -68,19 +70,15 @@ static void rcar_pwm_update(struct rcar_pwm_chip *rp, u32 mask, u32 data,
 static int rcar_pwm_get_clock_division(struct rcar_pwm_chip *rp, int period_ns)
 {
        unsigned long clk_rate = clk_get_rate(rp->clk);
-       unsigned long long max; /* max cycle / nanoseconds */
-       unsigned int div;
+       u64 div, tmp;
 
        if (clk_rate == 0)
                return -EINVAL;
 
-       for (div = 0; div <= RCAR_PWM_MAX_DIVISION; div++) {
-               max = (unsigned long long)NSEC_PER_SEC * RCAR_PWM_MAX_CYCLE *
-                       (1 << div);
-               do_div(max, clk_rate);
-               if (period_ns <= max)
-                       break;
-       }
+       div = (u64)NSEC_PER_SEC * RCAR_PWM_MAX_CYCLE;
+       tmp = (u64)period_ns * clk_rate + div - 1;
+       tmp = div64_u64(tmp, div);
+       div = ilog2(tmp - 1) + 1;
 
        return (div <= RCAR_PWM_MAX_DIVISION) ? div : -ERANGE;
 }