dt-bindings: ata: Convert apm,xgene-ahci to DT schema

Convert the APM X-Gene AHCI SATA Controller to DT schema format. It's a
straight-forward conversion.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>

diff --git a/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml b/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml
new file mode 100644 (file)
index 0000000..7dc9428
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/apm,xgene-ahci.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/apm,xgene-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: APM X-Gene 6.0 Gb/s SATA host controller
+
+maintainers:
+  - Rob Herring <robh@kernel.org>
+
+allOf:
+  - $ref: ahci-common.yaml#
+
+properties:
+  compatible:
+    enum:
+      - apm,xgene-ahci
+      - apm,xgene-ahci-pcie
+
+  reg:
+    minItems: 4
+    items:
+      - description: AHCI memory resource
+      - description: Host controller core
+      - description: Host controller diagnostic
+      - description: Host controller AXI
+      - description: Host controller MUX
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - clocks
+  - phys
+  - phy-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    sata@1a400000 {
+        compatible = "apm,xgene-ahci";
+        reg = <0x1a400000 0x1000>,
+              <0x1f220000 0x1000>,
+              <0x1f22d000 0x1000>,
+              <0x1f22e000 0x1000>,
+              <0x1f227000 0x1000>;
+        clocks = <&sataclk 0>;
+        dma-coherent;
+        interrupts = <0x0 0x87 0x4>;
+        phys = <&phy2 0>;
+        phy-names = "sata-phy";
+    };

diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt
deleted file mode 100644 (file)
index 02e690a..0000000
--- a/Documentation/devicetree/bindings/ata/apm-xgene.txt
+++ /dev/null
@@ -1,77 +0,0 @@
-* APM X-Gene 6.0 Gb/s SATA host controller nodes
-
-SATA host controller nodes are defined to describe on-chip Serial ATA
-controllers. Each SATA controller (pair of ports) have its own node.
-
-Required properties:
-- compatible           : Shall contain:
-  * "apm,xgene-ahci"
-- reg                  : First memory resource shall be the AHCI memory
-                         resource.
-                         Second memory resource shall be the host controller
-                         core memory resource.
-                         Third memory resource shall be the host controller
-                         diagnostic memory resource.
-                         4th memory resource shall be the host controller
-                         AXI memory resource.
-                         5th optional memory resource shall be the host
-                         controller MUX memory resource if required.
-- interrupts           : Interrupt-specifier for SATA host controller IRQ.
-- clocks               : Reference to the clock entry.
-- phys                 : A list of phandles + phy-specifiers, one for each
-                         entry in phy-names.
-- phy-names            : Should contain:
-  * "sata-phy" for the SATA 6.0Gbps PHY
-
-Optional properties:
-- dma-coherent         : Present if dma operations are coherent
-- status               : Shall be "ok" if enabled or "disabled" if disabled.
-                         Default is "ok".
-
-Example:
-               sataclk: sataclk {
-                       compatible = "fixed-clock";
-                       #clock-cells = <1>;
-                       clock-frequency = <100000000>;
-                       clock-output-names = "sataclk";
-               };
-
-               phy2: phy@1f22a000 {
-                       compatible = "apm,xgene-phy";
-                       reg = <0x0 0x1f22a000 0x0 0x100>;
-                       #phy-cells = <1>;
-               };
-
-               phy3: phy@1f23a000 {
-                       compatible = "apm,xgene-phy";
-                       reg = <0x0 0x1f23a000 0x0 0x100>;
-                       #phy-cells = <1>;
-               };
-
-               sata2: sata@1a400000 {
-                       compatible = "apm,xgene-ahci";
-                       reg = <0x0 0x1a400000 0x0 0x1000>,
-                             <0x0 0x1f220000 0x0 0x1000>,
-                             <0x0 0x1f22d000 0x0 0x1000>,
-                             <0x0 0x1f22e000 0x0 0x1000>,
-                             <0x0 0x1f227000 0x0 0x1000>;
-                       interrupts = <0x0 0x87 0x4>;
-                       dma-coherent;
-                       clocks = <&sataclk 0>;
-                       phys = <&phy2 0>;
-                       phy-names = "sata-phy";
-               };
-
-               sata3: sata@1a800000 {
-                       compatible = "apm,xgene-ahci-pcie";
-                       reg = <0x0 0x1a800000 0x0 0x1000>,
-                             <0x0 0x1f230000 0x0 0x1000>,
-                             <0x0 0x1f23d000 0x0 0x1000>,
-                             <0x0 0x1f23e000 0x0 0x1000>,
-                             <0x0 0x1f237000 0x0 0x1000>;
-                       interrupts = <0x0 0x88 0x4>;
-                       dma-coherent;
-                       clocks = <&sataclk 0>;
-                       phys = <&phy3 0>;
-                       phy-names = "sata-phy";
-               };