arm64: dts: imx95-tqma9596sa: add gpio bus recovery for i2c

Add pinctrl group for GPIO based bus recovery.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi
index cc251505f6280e2fbf0cd184b35f6e4d4f13f24a..9c892cd8ff21510968cfa55d02d636615e0dd93d 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi
@@ -263,8 +263,11 @@
 /* I2C_CAM0 */
 &lpi2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_lpi2c3>;
+       pinctrl-1 = <&pinctrl_lpi2c3_gpio>;
+       sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        dp_bridge: dp-bridge@f {
@@ -299,16 +302,22 @@
 /* I2C_CAM1 */
 &lpi2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_lpi2c4>;
+       pinctrl-1 = <&pinctrl_lpi2c4_gpio>;
+       sda-gpios = <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       scl-gpios = <&gpio2 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
 /* I2C_LCD */
 &lpi2c6 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_lpi2c6>;
+       pinctrl-1 = <&pinctrl_lpi2c6_gpio>;
+       sda-gpios = <&gpio2 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       scl-gpios = <&gpio2 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
@@ -606,16 +615,31 @@
                           <IMX95_PAD_GPIO_IO29__LPI2C3_SCL                     0x4000191e>;
        };
 
+       pinctrl_lpi2c3_gpio: lpi2c3-gpiogrp {
+               fsl,pins = <IMX95_PAD_GPIO_IO28__GPIO2_IO_BIT28         0x4000191e>,
+                          <IMX95_PAD_GPIO_IO29__GPIO2_IO_BIT29         0x4000191e>;
+       };
+
        pinctrl_lpi2c4: lpi2c4grp {
                fsl,pins = <IMX95_PAD_GPIO_IO30__LPI2C4_SDA             0x4000191e>,
                           <IMX95_PAD_GPIO_IO31__LPI2C4_SCL             0x4000191e>;
        };
 
+       pinctrl_lpi2c4_gpio: lpi2c4-gpiogrp {
+               fsl,pins = <IMX95_PAD_GPIO_IO30__GPIO2_IO_BIT30         0x4000191e>,
+                          <IMX95_PAD_GPIO_IO31__GPIO2_IO_BIT31         0x4000191e>;
+       };
+
        pinctrl_lpi2c6: lpi2c6grp {
                fsl,pins = <IMX95_PAD_GPIO_IO02__LPI2C6_SDA             0x4000191e>,
                           <IMX95_PAD_GPIO_IO03__LPI2C6_SCL             0x4000191e>;
        };
 
+       pinctrl_lpi2c6_gpio: lpi2c6-gpiogrp {
+               fsl,pins = <IMX95_PAD_GPIO_IO02__GPIO2_IO_BIT2          0x4000191e>,
+                          <IMX95_PAD_GPIO_IO03__GPIO2_IO_BIT3          0x4000191e>;
+       };
+
        pinctrl_lpspi3: lpspi3grp {
                fsl,pins = <IMX95_PAD_GPIO_IO07__GPIO2_IO_BIT7          0x51e>,
                           <IMX95_PAD_GPIO_IO08__GPIO2_IO_BIT8          0x51e>,