--- /dev/null
+From 216f8e95aacc8e9690d8e2286c472671b65f4128 Mon Sep 17 00:00:00 2001
+From: Shmuel Hazan <sh@tkos.co.il>
+Date: Tue, 23 Jun 2020 09:03:35 +0300
+Subject: PCI: mvebu: Setup BAR0 in order to fix MSI
+
+From: Shmuel Hazan <sh@tkos.co.il>
+
+commit 216f8e95aacc8e9690d8e2286c472671b65f4128 upstream.
+
+According to the Armada XP datasheet, section 10.2.6: "in order for
+the device to do a write to the MSI doorbell address, it needs to write
+to a register in the internal registers space".
+
+As a result of the requirement above, without this patch, MSI won't
+function and therefore some devices won't operate properly without
+pci=nomsi.
+
+This requirement was not present at the time of writing this driver
+since the vendor u-boot always initializes all PCIe controllers
+(incl. BAR0 initialization) and for some time, the vendor u-boot was
+the only available bootloader for this driver's SoCs (e.g. A38x,A37x,
+etc).
+
+Tested on an Armada 385 board on mainline u-boot (2020.4), without
+u-boot PCI initialization and the following PCIe devices:
+ - Wilocity Wil6200 rev 2 (wil6210)
+ - Qualcomm Atheros QCA6174 (ath10k_pci)
+
+Both failed to get a response from the device after loading the
+firmware and seem to operate properly with this patch.
+
+Link: https://lore.kernel.org/r/20200623060334.108444-1-sh@tkos.co.il
+Signed-off-by: Shmuel Hazan <sh@tkos.co.il>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
+Cc: Baruch Siach <baruch@tkos.co.il>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/pci/controller/pci-mvebu.c | 16 ++++++++++++----
+ 1 file changed, 12 insertions(+), 4 deletions(-)
+
+--- a/drivers/pci/controller/pci-mvebu.c
++++ b/drivers/pci/controller/pci-mvebu.c
+@@ -105,6 +105,7 @@ struct mvebu_pcie_port {
+ struct mvebu_pcie_window memwin;
+ struct mvebu_pcie_window iowin;
+ u32 saved_pcie_stat;
++ struct resource regs;
+ };
+
+ static inline void mvebu_writel(struct mvebu_pcie_port *port, u32 val, u32 reg)
+@@ -149,7 +150,9 @@ static void mvebu_pcie_set_local_dev_nr(
+
+ /*
+ * Setup PCIE BARs and Address Decode Wins:
+- * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks
++ * BAR[0] -> internal registers (needed for MSI)
++ * BAR[1] -> covers all DRAM banks
++ * BAR[2] -> Disabled
+ * WIN[0-3] -> DRAM bank[0-3]
+ */
+ static void mvebu_pcie_setup_wins(struct mvebu_pcie_port *port)
+@@ -203,6 +206,12 @@ static void mvebu_pcie_setup_wins(struct
+ mvebu_writel(port, 0, PCIE_BAR_HI_OFF(1));
+ mvebu_writel(port, ((size - 1) & 0xffff0000) | 1,
+ PCIE_BAR_CTRL_OFF(1));
++
++ /*
++ * Point BAR[0] to the device's internal registers.
++ */
++ mvebu_writel(port, round_down(port->regs.start, SZ_1M), PCIE_BAR_LO_OFF(0));
++ mvebu_writel(port, 0, PCIE_BAR_HI_OFF(0));
+ }
+
+ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
+@@ -708,14 +717,13 @@ static void __iomem *mvebu_pcie_map_regi
+ struct device_node *np,
+ struct mvebu_pcie_port *port)
+ {
+- struct resource regs;
+ int ret = 0;
+
+- ret = of_address_to_resource(np, 0, ®s);
++ ret = of_address_to_resource(np, 0, &port->regs);
+ if (ret)
+ return ERR_PTR(ret);
+
+- return devm_ioremap_resource(&pdev->dev, ®s);
++ return devm_ioremap_resource(&pdev->dev, &port->regs);
+ }
+
+ #define DT_FLAGS_TO_TYPE(flags) (((flags) >> 24) & 0x03)
--- /dev/null
+From 333cf507465fbebb3727f5b53e77538467df312a Mon Sep 17 00:00:00 2001
+From: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
+Date: Thu, 29 Jul 2021 11:34:49 +0530
+Subject: powerpc/pseries: Fix regression while building external modules
+
+From: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
+
+commit 333cf507465fbebb3727f5b53e77538467df312a upstream.
+
+With commit c9f3401313a5 ("powerpc: Always enable queued spinlocks for
+64s, disable for others") CONFIG_PPC_QUEUED_SPINLOCKS is always
+enabled on ppc64le, external modules that use spinlock APIs are
+failing.
+
+ ERROR: modpost: GPL-incompatible module XXX.ko uses GPL-only symbol 'shared_processor'
+
+Before the above commit, modules were able to build without any
+issues. Also this problem is not seen on other architectures. This
+problem can be workaround if CONFIG_UNINLINE_SPIN_UNLOCK is enabled in
+the config. However CONFIG_UNINLINE_SPIN_UNLOCK is not enabled by
+default and only enabled in certain conditions like
+CONFIG_DEBUG_SPINLOCKS is set in the kernel config.
+
+ #include <linux/module.h>
+ spinlock_t spLock;
+
+ static int __init spinlock_test_init(void)
+ {
+ spin_lock_init(&spLock);
+ spin_lock(&spLock);
+ spin_unlock(&spLock);
+ return 0;
+ }
+
+ static void __exit spinlock_test_exit(void)
+ {
+ printk("spinlock_test unloaded\n");
+ }
+ module_init(spinlock_test_init);
+ module_exit(spinlock_test_exit);
+
+ MODULE_DESCRIPTION ("spinlock_test");
+ MODULE_LICENSE ("non-GPL");
+ MODULE_AUTHOR ("Srikar Dronamraju");
+
+Given that spin locks are one of the basic facilities for module code,
+this effectively makes it impossible to build/load almost any non GPL
+modules on ppc64le.
+
+This was first reported at https://github.com/openzfs/zfs/issues/11172
+
+Currently shared_processor is exported as GPL only symbol.
+Fix this for parity with other architectures by exposing
+shared_processor to non-GPL modules too.
+
+Fixes: 14c73bd344da ("powerpc/vcpu: Assume dedicated processors as non-preempt")
+Cc: stable@vger.kernel.org # v5.5+
+Reported-by: marc.c.dionne@gmail.com
+Signed-off-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
+Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
+Link: https://lore.kernel.org/r/20210729060449.292780-1-srikar@linux.vnet.ibm.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/powerpc/platforms/pseries/setup.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/powerpc/platforms/pseries/setup.c
++++ b/arch/powerpc/platforms/pseries/setup.c
+@@ -75,7 +75,7 @@
+ #include "../../../../drivers/pci/pci.h"
+
+ DEFINE_STATIC_KEY_FALSE(shared_processor);
+-EXPORT_SYMBOL_GPL(shared_processor);
++EXPORT_SYMBOL(shared_processor);
+
+ int CMO_PrPSP = -1;
+ int CMO_SecPSP = -1;
--- /dev/null
+From 9bac1bd6e6d36459087a728a968e79e37ebcea1a Mon Sep 17 00:00:00 2001
+From: Arnaldo Carvalho de Melo <acme@redhat.com>
+Date: Fri, 30 Jul 2021 18:26:22 -0300
+Subject: Revert "perf map: Fix dso->nsinfo refcounting"
+
+From: Arnaldo Carvalho de Melo <acme@redhat.com>
+
+commit 9bac1bd6e6d36459087a728a968e79e37ebcea1a upstream.
+
+This makes 'perf top' abort in some cases, and the right fix will
+involve surgery that is too much to do at this stage, so revert for now
+and fix it in the next merge window.
+
+This reverts commit 2d6b74baa7147251c30a46c4996e8cc224aa2dc5.
+
+Cc: Riccardo Mancini <rickyman7@gmail.com>
+Cc: Ian Rogers <irogers@google.com>
+Cc: Jiri Olsa <jolsa@redhat.com>
+Cc: Krister Johansen <kjlx@templeofstupid.com>
+Cc: Mark Rutland <mark.rutland@arm.com>
+Cc: Namhyung Kim <namhyung@kernel.org>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ tools/perf/util/map.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/tools/perf/util/map.c
++++ b/tools/perf/util/map.c
+@@ -214,8 +214,6 @@ struct map *map__new(struct machine *mac
+ if (!(prot & PROT_EXEC))
+ dso__set_loaded(dso);
+ }
+-
+- nsinfo__put(dso->nsinfo);
+ dso->nsinfo = nsi;
+ dso__put(dso);
+ }
sis900-fix-missing-pci_disable_device-in-probe-and-r.patch
can-hi311x-fix-a-signedness-bug-in-hi3110_cmd.patch
bpf-verifier-allocate-idmap-scratch-in-verifier-env.patch
+pci-mvebu-setup-bar0-in-order-to-fix-msi.patch
+powerpc-pseries-fix-regression-while-building-external-modules.patch
+revert-perf-map-fix-dso-nsinfo-refcounting.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
