* doc/extend.texi (x86 specific memory model extensions for

	transactional memory): Simplify a phrase.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@245189 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9e751381511d6e66a9b0c06b40f79341718b5092..e0d251dbcdc30b1e09757ff2634db614ab061c94 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-02-05  Gerald Pfeifer  <gerald@pfeifer.com>
+
+       * doc/extend.texi (x86 specific memory model extensions for
+       transactional memory): Simplify a phrase.
+
 2017-02-05  Eric Botcazou  <ebotcazou@adacore.com>
 
        PR target/79353

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 20eba822d54542714c18b530f6c6abc5b9da53f8..24e5053873605a4deb23d84e66fdda97aa5f6c59 100644 (file)
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -10103,7 +10103,7 @@ after addition, conditional jump on carry etc.
 @section x86-Specific Memory Model Extensions for Transactional Memory
 
 The x86 architecture supports additional memory ordering flags
-to mark lock critical sections for hardware lock elision. 
+to mark critical sections for hardware lock elision. 
 These must be specified in addition to an existing memory order to
 atomic intrinsics.