--- /dev/null
+From b53df2e7442c73a932fb74228147fb946e531585 Mon Sep 17 00:00:00 2001
+From: Shin'ichiro Kawasaki <shinichiro.kawasaki@wdc.com>
+Date: Fri, 21 Feb 2020 10:37:08 +0900
+Subject: block: Fix partition support for host aware zoned block devices
+
+From: Shin'ichiro Kawasaki <shinichiro.kawasaki@wdc.com>
+
+commit b53df2e7442c73a932fb74228147fb946e531585 upstream.
+
+Commit b72053072c0b ("block: allow partitions on host aware zone
+devices") introduced the helper function disk_has_partitions() to check
+if a given disk has valid partitions. However, since this function result
+directly depends on the disk partition table length rather than the
+actual existence of valid partitions in the table, it returns true even
+after all partitions are removed from the disk. For host aware zoned
+block devices, this results in zone management support to be kept
+disabled even after removing all partitions.
+
+Fix this by changing disk_has_partitions() to walk through the partition
+table entries and return true if and only if a valid non-zero size
+partition is found.
+
+Fixes: b72053072c0b ("block: allow partitions on host aware zone devices")
+Cc: stable@vger.kernel.org # 5.5
+Reviewed-by: Damien Le Moal <damien.lemoal@wdc.com>
+Reviewed-by: Johannes Thumshirn <johannes.thumshirn@wdc.com>
+Reviewed-by: Christoph Hellwig <hch@lst.de>
+Signed-off-by: Shin'ichiro Kawasaki <shinichiro.kawasaki@wdc.com>
+Signed-off-by: Jens Axboe <axboe@kernel.dk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+diff --git a/block/genhd.c b/block/genhd.c
+index ff6268970ddc..9c2e13ce0d19 100644
+--- a/block/genhd.c
++++ b/block/genhd.c
+@@ -301,6 +301,42 @@ struct hd_struct *disk_map_sector_rcu(struct gendisk *disk, sector_t sector)
+ }
+ EXPORT_SYMBOL_GPL(disk_map_sector_rcu);
+
++/**
++ * disk_has_partitions
++ * @disk: gendisk of interest
++ *
++ * Walk through the partition table and check if valid partition exists.
++ *
++ * CONTEXT:
++ * Don't care.
++ *
++ * RETURNS:
++ * True if the gendisk has at least one valid non-zero size partition.
++ * Otherwise false.
++ */
++bool disk_has_partitions(struct gendisk *disk)
++{
++ struct disk_part_tbl *ptbl;
++ int i;
++ bool ret = false;
++
++ rcu_read_lock();
++ ptbl = rcu_dereference(disk->part_tbl);
++
++ /* Iterate partitions skipping the whole device at index 0 */
++ for (i = 1; i < ptbl->len; i++) {
++ if (rcu_dereference(ptbl->part[i])) {
++ ret = true;
++ break;
++ }
++ }
++
++ rcu_read_unlock();
++
++ return ret;
++}
++EXPORT_SYMBOL_GPL(disk_has_partitions);
++
+ /*
+ * Can be deleted altogether. Later.
+ *
+diff --git a/include/linux/genhd.h b/include/linux/genhd.h
+index 6fbe58538ad6..07dc91835b98 100644
+--- a/include/linux/genhd.h
++++ b/include/linux/genhd.h
+@@ -245,18 +245,6 @@ static inline bool disk_part_scan_enabled(struct gendisk *disk)
+ !(disk->flags & GENHD_FL_NO_PART_SCAN);
+ }
+
+-static inline bool disk_has_partitions(struct gendisk *disk)
+-{
+- bool ret = false;
+-
+- rcu_read_lock();
+- if (rcu_dereference(disk->part_tbl)->len > 1)
+- ret = true;
+- rcu_read_unlock();
+-
+- return ret;
+-}
+-
+ static inline dev_t disk_devt(struct gendisk *disk)
+ {
+ return MKDEV(disk->major, disk->first_minor);
+@@ -298,6 +286,7 @@ extern void disk_part_iter_exit(struct disk_part_iter *piter);
+
+ extern struct hd_struct *disk_map_sector_rcu(struct gendisk *disk,
+ sector_t sector);
++bool disk_has_partitions(struct gendisk *disk);
+
+ /*
+ * Macros to operate on percpu disk statistics:
--- /dev/null
+From d9a9f4849fe0c9d560851ab22a85a666cddfdd24 Mon Sep 17 00:00:00 2001
+From: Al Viro <viro@zeniv.linux.org.uk>
+Date: Thu, 12 Mar 2020 18:25:20 -0400
+Subject: cifs_atomic_open(): fix double-put on late allocation failure
+
+From: Al Viro <viro@zeniv.linux.org.uk>
+
+commit d9a9f4849fe0c9d560851ab22a85a666cddfdd24 upstream.
+
+several iterations of ->atomic_open() calling conventions ago, we
+used to need fput() if ->atomic_open() failed at some point after
+successful finish_open(). Now (since 2016) it's not needed -
+struct file carries enough state to make fput() work regardless
+of the point in struct file lifecycle and discarding it on
+failure exits in open() got unified. Unfortunately, I'd missed
+the fact that we had an instance of ->atomic_open() (cifs one)
+that used to need that fput(), as well as the stale comment in
+finish_open() demanding such late failure handling. Trivially
+fixed...
+
+Fixes: fe9ec8291fca "do_last(): take fput() on error after opening to out:"
+Cc: stable@kernel.org # v4.7+
+Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ Documentation/filesystems/porting.rst | 8 ++++++++
+ fs/cifs/dir.c | 1 -
+ fs/open.c | 3 ---
+ 3 files changed, 8 insertions(+), 4 deletions(-)
+
+--- a/Documentation/filesystems/porting.rst
++++ b/Documentation/filesystems/porting.rst
+@@ -850,3 +850,11 @@ business doing so.
+ d_alloc_pseudo() is internal-only; uses outside of alloc_file_pseudo() are
+ very suspect (and won't work in modules). Such uses are very likely to
+ be misspelled d_alloc_anon().
++
++---
++
++**mandatory**
++
++[should've been added in 2016] stale comment in finish_open() nonwithstanding,
++failure exits in ->atomic_open() instances should *NOT* fput() the file,
++no matter what. Everything is handled by the caller.
+--- a/fs/cifs/dir.c
++++ b/fs/cifs/dir.c
+@@ -558,7 +558,6 @@ cifs_atomic_open(struct inode *inode, st
+ if (server->ops->close)
+ server->ops->close(xid, tcon, &fid);
+ cifs_del_pending_open(&open);
+- fput(file);
+ rc = -ENOMEM;
+ }
+
+--- a/fs/open.c
++++ b/fs/open.c
+@@ -860,9 +860,6 @@ cleanup_file:
+ * the return value of d_splice_alias(), then the caller needs to perform dput()
+ * on it after finish_open().
+ *
+- * On successful return @file is a fully instantiated open file. After this, if
+- * an error occurs in ->atomic_open(), it needs to clean up with fput().
+- *
+ * Returns zero on success or -errno if the open failed.
+ */
+ int finish_open(struct file *file, struct dentry *dentry,
--- /dev/null
+From c67b35d970ed3391069c21f3071a26f687399ab2 Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Thu, 5 Mar 2020 10:42:10 +0000
+Subject: drm/i915: Actually emit the await_start
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit c67b35d970ed3391069c21f3071a26f687399ab2 upstream.
+
+Fix the inverted test to emit the wait on the end of the previous
+request if we /haven't/ already.
+
+Fixes: 6a79d848403d ("drm/i915: Lock signaler timeline while navigating")
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
+Cc: <stable@vger.kernel.org> # v5.5+
+Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20200305104210.2619967-1-chris@chris-wilson.co.uk
+(cherry picked from commit 07e9c59d63df6a1c44c1975c01827ba18b69270a)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_request.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/i915_request.c
++++ b/drivers/gpu/drm/i915/i915_request.c
+@@ -785,7 +785,7 @@ i915_request_await_start(struct i915_req
+ return PTR_ERR_OR_ZERO(fence);
+
+ err = 0;
+- if (intel_timeline_sync_is_later(i915_request_timeline(rq), fence))
++ if (!intel_timeline_sync_is_later(i915_request_timeline(rq), fence))
+ err = i915_sw_fence_await_dma_fence(&rq->submit,
+ fence, 0,
+ I915_FENCE_GFP);
--- /dev/null
+From 1d61c5d711a2dc0b978ae905535edee9601f9449 Mon Sep 17 00:00:00 2001
+From: Matthew Auld <matthew.auld@intel.com>
+Date: Thu, 5 Mar 2020 20:35:34 +0000
+Subject: drm/i915: be more solid in checking the alignment
+
+From: Matthew Auld <matthew.auld@intel.com>
+
+commit 1d61c5d711a2dc0b978ae905535edee9601f9449 upstream.
+
+The alignment is u64, and yet is_power_of_2() assumes unsigned long,
+which might give different results between 32b and 64b kernel.
+
+Signed-off-by: Matthew Auld <matthew.auld@intel.com>
+Cc: Chris Wilson <chris@chris-wilson.co.uk>
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Link: https://patchwork.freedesktop.org/patch/msgid/20200305203534.210466-1-matthew.auld@intel.com
+Cc: stable@vger.kernel.org
+(cherry picked from commit 2920516b2f719546f55079bc39a7fe409d9e80ab)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 3 ++-
+ drivers/gpu/drm/i915/i915_utils.h | 5 +++++
+ 2 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
++++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+@@ -441,7 +441,8 @@ eb_validate_vma(struct i915_execbuffer *
+ if (unlikely(entry->flags & eb->invalid_flags))
+ return -EINVAL;
+
+- if (unlikely(entry->alignment && !is_power_of_2(entry->alignment)))
++ if (unlikely(entry->alignment &&
++ !is_power_of_2_u64(entry->alignment)))
+ return -EINVAL;
+
+ /*
+--- a/drivers/gpu/drm/i915/i915_utils.h
++++ b/drivers/gpu/drm/i915/i915_utils.h
+@@ -234,6 +234,11 @@ static inline u64 ptr_to_u64(const void
+ __idx; \
+ })
+
++static inline bool is_power_of_2_u64(u64 n)
++{
++ return (n != 0 && ((n & (n - 1)) == 0));
++}
++
+ static inline void __list_del_many(struct list_head *head,
+ struct list_head *first)
+ {
--- /dev/null
+From 14a0d527a479eb2cb6067f9e5e163e1bf35db2a9 Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Tue, 10 Mar 2020 10:17:20 +0000
+Subject: drm/i915: Defer semaphore priority bumping to a workqueue
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 14a0d527a479eb2cb6067f9e5e163e1bf35db2a9 upstream.
+
+Since the semaphore fence may be signaled from inside an interrupt
+handler from inside a request holding its request->lock, we cannot then
+enter into the engine->active.lock for processing the semaphore priority
+bump as we may traverse our call tree and end up on another held
+request.
+
+CPU 0:
+[ 2243.218864] _raw_spin_lock_irqsave+0x9a/0xb0
+[ 2243.218867] i915_schedule_bump_priority+0x49/0x80 [i915]
+[ 2243.218869] semaphore_notify+0x6d/0x98 [i915]
+[ 2243.218871] __i915_sw_fence_complete+0x61/0x420 [i915]
+[ 2243.218874] ? kmem_cache_free+0x211/0x290
+[ 2243.218876] i915_sw_fence_complete+0x58/0x80 [i915]
+[ 2243.218879] dma_i915_sw_fence_wake+0x3e/0x80 [i915]
+[ 2243.218881] signal_irq_work+0x571/0x690 [i915]
+[ 2243.218883] irq_work_run_list+0xd7/0x120
+[ 2243.218885] irq_work_run+0x1d/0x50
+[ 2243.218887] smp_irq_work_interrupt+0x21/0x30
+[ 2243.218889] irq_work_interrupt+0xf/0x20
+
+CPU 1:
+[ 2242.173107] _raw_spin_lock+0x8f/0xa0
+[ 2242.173110] __i915_request_submit+0x64/0x4a0 [i915]
+[ 2242.173112] __execlists_submission_tasklet+0x8ee/0x2120 [i915]
+[ 2242.173114] ? i915_sched_lookup_priolist+0x1e3/0x2b0 [i915]
+[ 2242.173117] execlists_submit_request+0x2e8/0x2f0 [i915]
+[ 2242.173119] submit_notify+0x8f/0xc0 [i915]
+[ 2242.173121] __i915_sw_fence_complete+0x61/0x420 [i915]
+[ 2242.173124] ? _raw_spin_unlock_irqrestore+0x39/0x40
+[ 2242.173137] i915_sw_fence_complete+0x58/0x80 [i915]
+[ 2242.173140] i915_sw_fence_commit+0x16/0x20 [i915]
+
+Closes: https://gitlab.freedesktop.org/drm/intel/issues/1318
+Fixes: b7404c7ecb38 ("drm/i915: Bump ready tasks ahead of busywaits")
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Cc: <stable@vger.kernel.org> # v5.2+
+Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20200310101720.9944-1-chris@chris-wilson.co.uk
+(cherry picked from commit 209df10bb4536c81c2540df96c02cd079435357f)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_request.c | 22 +++++++++++++++++-----
+ drivers/gpu/drm/i915/i915_request.h | 2 ++
+ 2 files changed, 19 insertions(+), 5 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_request.c
++++ b/drivers/gpu/drm/i915/i915_request.c
+@@ -529,19 +529,31 @@ submit_notify(struct i915_sw_fence *fenc
+ return NOTIFY_DONE;
+ }
+
++static void irq_semaphore_cb(struct irq_work *wrk)
++{
++ struct i915_request *rq =
++ container_of(wrk, typeof(*rq), semaphore_work);
++
++ i915_schedule_bump_priority(rq, I915_PRIORITY_NOSEMAPHORE);
++ i915_request_put(rq);
++}
++
+ static int __i915_sw_fence_call
+ semaphore_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
+ {
+- struct i915_request *request =
+- container_of(fence, typeof(*request), semaphore);
++ struct i915_request *rq = container_of(fence, typeof(*rq), semaphore);
+
+ switch (state) {
+ case FENCE_COMPLETE:
+- i915_schedule_bump_priority(request, I915_PRIORITY_NOSEMAPHORE);
++ if (!(READ_ONCE(rq->sched.attr.priority) & I915_PRIORITY_NOSEMAPHORE)) {
++ i915_request_get(rq);
++ init_irq_work(&rq->semaphore_work, irq_semaphore_cb);
++ irq_work_queue(&rq->semaphore_work);
++ }
+ break;
+
+ case FENCE_FREE:
+- i915_request_put(request);
++ i915_request_put(rq);
+ break;
+ }
+
+@@ -1283,9 +1295,9 @@ void __i915_request_queue(struct i915_re
+ * decide whether to preempt the entire chain so that it is ready to
+ * run at the earliest possible convenience.
+ */
+- i915_sw_fence_commit(&rq->semaphore);
+ if (attr && rq->engine->schedule)
+ rq->engine->schedule(rq, attr);
++ i915_sw_fence_commit(&rq->semaphore);
+ i915_sw_fence_commit(&rq->submit);
+ }
+
+--- a/drivers/gpu/drm/i915/i915_request.h
++++ b/drivers/gpu/drm/i915/i915_request.h
+@@ -26,6 +26,7 @@
+ #define I915_REQUEST_H
+
+ #include <linux/dma-fence.h>
++#include <linux/irq_work.h>
+ #include <linux/lockdep.h>
+
+ #include "gt/intel_context_types.h"
+@@ -147,6 +148,7 @@ struct i915_request {
+ };
+ struct list_head execute_cb;
+ struct i915_sw_fence semaphore;
++ struct irq_work semaphore_work;
+
+ /*
+ * A list of everyone we wait upon, and everyone who waits upon us.
--- /dev/null
+From eafc2aa20fba319b6e791a1b0c45a91511eccb6b Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri, 6 Mar 2020 11:30:10 +0000
+Subject: drm/i915/execlists: Enable timeslice on partial virtual engine dequeue
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit eafc2aa20fba319b6e791a1b0c45a91511eccb6b upstream.
+
+If we stop filling the ELSP due to an incompatible virtual engine
+request, check if we should enable the timeslice on behalf of the queue.
+
+This fixes the case where we are inspecting the last->next element when
+we know that the last element is the last request in the execution queue,
+and so decided we did not need to enable timeslicing despite the intent
+to do so!
+
+Fixes: 8ee36e048c98 ("drm/i915/execlists: Minimalistic timeslicing")
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
+Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Cc: <stable@vger.kernel.org> # v5.4+
+Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20200306113012.3184606-1-chris@chris-wilson.co.uk
+(cherry picked from commit 3df2deed411e0f1b7312baf0139aab8bba4c0410)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/gt/intel_lrc.c | 29 ++++++++++++++++++-----------
+ 1 file changed, 18 insertions(+), 11 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
++++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
+@@ -1501,11 +1501,9 @@ need_timeslice(struct intel_engine_cs *e
+ if (!intel_engine_has_timeslices(engine))
+ return false;
+
+- if (list_is_last(&rq->sched.link, &engine->active.requests))
+- return false;
+-
+- hint = max(rq_prio(list_next_entry(rq, sched.link)),
+- engine->execlists.queue_priority_hint);
++ hint = engine->execlists.queue_priority_hint;
++ if (!list_is_last(&rq->sched.link, &engine->active.requests))
++ hint = max(hint, rq_prio(list_next_entry(rq, sched.link)));
+
+ return hint >= effective_prio(rq);
+ }
+@@ -1547,6 +1545,18 @@ static void set_timeslice(struct intel_e
+ set_timer_ms(&engine->execlists.timer, active_timeslice(engine));
+ }
+
++static void start_timeslice(struct intel_engine_cs *engine)
++{
++ struct intel_engine_execlists *execlists = &engine->execlists;
++
++ execlists->switch_priority_hint = execlists->queue_priority_hint;
++
++ if (timer_pending(&execlists->timer))
++ return;
++
++ set_timer_ms(&execlists->timer, timeslice(engine));
++}
++
+ static void record_preemption(struct intel_engine_execlists *execlists)
+ {
+ (void)I915_SELFTEST_ONLY(execlists->preempt_hang.count++);
+@@ -1705,11 +1715,7 @@ static void execlists_dequeue(struct int
+ * Even if ELSP[1] is occupied and not worthy
+ * of timeslices, our queue might be.
+ */
+- if (!execlists->timer.expires &&
+- need_timeslice(engine, last))
+- set_timer_ms(&execlists->timer,
+- timeslice(engine));
+-
++ start_timeslice(engine);
+ return;
+ }
+ }
+@@ -1744,7 +1750,8 @@ static void execlists_dequeue(struct int
+
+ if (last && !can_merge_rq(last, rq)) {
+ spin_unlock(&ve->base.active.lock);
+- return; /* leave this for another */
++ start_timeslice(engine);
++ return; /* leave this for another sibling */
+ }
+
+ GEM_TRACE("%s: virtual rq=%llx:%lld%s, new engine? %s\n",
--- /dev/null
+From 8ea6bb8e4d47e07518e5dba4f5cb77e210f0df82 Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri, 6 Mar 2020 15:46:47 +0000
+Subject: drm/i915/gt: Close race between cacheline_retire and free
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 8ea6bb8e4d47e07518e5dba4f5cb77e210f0df82 upstream.
+
+If the cacheline may still be busy, atomically mark it for future
+release, and only if we can determine that it will never be used again,
+immediately free it.
+
+Closes: https://gitlab.freedesktop.org/drm/intel/issues/1392
+Fixes: ebece7539242 ("drm/i915: Keep timeline HWSP allocated until idle across the system")
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
+Cc: Matthew Auld <matthew.auld@intel.com>
+Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
+Cc: <stable@vger.kernel.org> # v5.2+
+Link: https://patchwork.freedesktop.org/patch/msgid/20200306154647.3528345-1-chris@chris-wilson.co.uk
+(cherry picked from commit 2d4bd971f5baa51418625f379a69f5d58b5a0450)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/gt/intel_timeline.c | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
++++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
+@@ -197,11 +197,15 @@ static void cacheline_release(struct int
+
+ static void cacheline_free(struct intel_timeline_cacheline *cl)
+ {
++ if (!i915_active_acquire_if_busy(&cl->active)) {
++ __idle_cacheline_free(cl);
++ return;
++ }
++
+ GEM_BUG_ON(ptr_test_bit(cl->vaddr, CACHELINE_FREE));
+ cl->vaddr = ptr_set_bit(cl->vaddr, CACHELINE_FREE);
+
+- if (i915_active_is_idle(&cl->active))
+- __idle_cacheline_free(cl);
++ i915_active_release(&cl->active);
+ }
+
+ int intel_timeline_init(struct intel_timeline *timeline,
--- /dev/null
+From c951b0af2dddbb1f34be103029eb9030392d5554 Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Thu, 5 Mar 2020 13:48:22 +0000
+Subject: drm/i915: Return early for await_start on same timeline
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit c951b0af2dddbb1f34be103029eb9030392d5554 upstream.
+
+Requests within a timeline are ordered by that timeline, so awaiting for
+the start of a request within the timeline is a no-op. This used to work
+by falling out of the mutex_trylock() as the signaler and waiter had the
+same timeline and not returning an error.
+
+Fixes: 6a79d848403d ("drm/i915: Lock signaler timeline while navigating")
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
+Cc: <stable@vger.kernel.org> # v5.5+
+Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20200305134822.2750496-1-chris@chris-wilson.co.uk
+(cherry picked from commit ab7a69020fb5d5c7ba19fba60f62fd6f9ca9f779)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_request.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_request.c
++++ b/drivers/gpu/drm/i915/i915_request.c
+@@ -759,8 +759,8 @@ i915_request_await_start(struct i915_req
+ struct dma_fence *fence;
+ int err;
+
+- GEM_BUG_ON(i915_request_timeline(rq) ==
+- rcu_access_pointer(signal->timeline));
++ if (i915_request_timeline(rq) == rcu_access_pointer(signal->timeline))
++ return 0;
+
+ rcu_read_lock();
+ tl = rcu_dereference(signal->timeline);
--- /dev/null
+From 4d00fc477a2ce8b6d2b09fb34ef9fe9918e7d434 Mon Sep 17 00:00:00 2001
+From: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
+Date: Mon, 9 Mar 2020 16:00:11 -0400
+Subject: ktest: Add timeout for ssh sync testing
+
+From: Steven Rostedt (VMware) <rostedt@goodmis.org>
+
+commit 4d00fc477a2ce8b6d2b09fb34ef9fe9918e7d434 upstream.
+
+Before rebooting the box, a "ssh sync" is called to the test machine to see
+if it is alive or not. But if the test machine is in a partial state, that
+ssh may never actually finish, and the ktest test hangs.
+
+Add a 10 second timeout to the sync test, which will fail after 10 seconds
+and then cause the test to reboot the test machine.
+
+Cc: stable@vger.kernel.org
+Fixes: 6474ace999edd ("ktest.pl: Powercycle the box on reboot if no connection can be made")
+Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ tools/testing/ktest/ktest.pl | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/tools/testing/ktest/ktest.pl
++++ b/tools/testing/ktest/ktest.pl
+@@ -1383,7 +1383,7 @@ sub reboot {
+
+ } else {
+ # Make sure everything has been written to disk
+- run_ssh("sync");
++ run_ssh("sync", 10);
+
+ if (defined($time)) {
+ start_monitor;
--- /dev/null
+From 31e43f31890ca6e909b27dcb539252b46aa465da Mon Sep 17 00:00:00 2001
+From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
+Date: Wed, 19 Feb 2020 17:29:00 +0800
+Subject: mmc: sdhci-pci-gli: Enable MSI interrupt for GL975x
+
+From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
+
+commit 31e43f31890ca6e909b27dcb539252b46aa465da upstream.
+
+Enable MSI interrupt for GL9750/GL9755. Some platforms
+do not support PCI INTx and devices can not work without
+interrupt. Like messages below:
+
+[ 4.487132] sdhci-pci 0000:01:00.0: SDHCI controller found [17a0:9755] (rev 0)
+[ 4.487198] ACPI BIOS Error (bug): Could not resolve symbol [\_SB.PCI0.PBR2._PRT.APS2], AE_NOT_FOUND (20190816/psargs-330)
+[ 4.487397] ACPI Error: Aborting method \_SB.PCI0.PBR2._PRT due to previous error (AE_NOT_FOUND) (20190816/psparse-529)
+[ 4.487707] pcieport 0000:00:01.3: can't derive routing for PCI INT A
+[ 4.487709] sdhci-pci 0000:01:00.0: PCI INT A: no GSI
+
+Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
+Tested-by: Raul E Rangel <rrangel@chromium.org>
+Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support")
+Cc: stable@vger.kernel.org
+Link: https://lore.kernel.org/r/20200219092900.9151-1-benchuanggli@gmail.com
+Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/mmc/host/sdhci-pci-gli.c | 17 +++++++++++++++++
+ 1 file changed, 17 insertions(+)
+
+--- a/drivers/mmc/host/sdhci-pci-gli.c
++++ b/drivers/mmc/host/sdhci-pci-gli.c
+@@ -262,10 +262,26 @@ static int gl9750_execute_tuning(struct
+ return 0;
+ }
+
++static void gli_pcie_enable_msi(struct sdhci_pci_slot *slot)
++{
++ int ret;
++
++ ret = pci_alloc_irq_vectors(slot->chip->pdev, 1, 1,
++ PCI_IRQ_MSI | PCI_IRQ_MSIX);
++ if (ret < 0) {
++ pr_warn("%s: enable PCI MSI failed, error=%d\n",
++ mmc_hostname(slot->host->mmc), ret);
++ return;
++ }
++
++ slot->host->irq = pci_irq_vector(slot->chip->pdev, 0);
++}
++
+ static int gli_probe_slot_gl9750(struct sdhci_pci_slot *slot)
+ {
+ struct sdhci_host *host = slot->host;
+
++ gli_pcie_enable_msi(slot);
+ slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
+ sdhci_enable_v4_mode(host);
+
+@@ -276,6 +292,7 @@ static int gli_probe_slot_gl9755(struct
+ {
+ struct sdhci_host *host = slot->host;
+
++ gli_pcie_enable_msi(slot);
+ slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
+ sdhci_enable_v4_mode(host);
+
--- /dev/null
+From d62e7fbea4951c124a24176da0c7bf3003ec53d4 Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Thu, 5 Mar 2020 19:22:45 +0100
+Subject: pinctrl: falcon: fix syntax error
+
+From: Mathias Kresin <dev@kresin.me>
+
+commit d62e7fbea4951c124a24176da0c7bf3003ec53d4 upstream.
+
+Add the missing semicolon after of_node_put to get the file compiled.
+
+Fixes: f17d2f54d36d ("pinctrl: falcon: Add of_node_put() before return")
+Cc: stable@vger.kernel.org # v5.4+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+Link: https://lore.kernel.org/r/20200305182245.9636-1-dev@kresin.me
+Acked-by: Thomas Langer <thomas.langer@intel.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pinctrl/pinctrl-falcon.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/pinctrl/pinctrl-falcon.c
++++ b/drivers/pinctrl/pinctrl-falcon.c
+@@ -451,7 +451,7 @@ static int pinctrl_falcon_probe(struct p
+ falcon_info.clk[*bank] = clk_get(&ppdev->dev, NULL);
+ if (IS_ERR(falcon_info.clk[*bank])) {
+ dev_err(&ppdev->dev, "failed to get clock\n");
+- of_node_put(np)
++ of_node_put(np);
+ return PTR_ERR(falcon_info.clk[*bank]);
+ }
+ falcon_info.membase[*bank] = devm_ioremap_resource(&pdev->dev,
--- /dev/null
+From 1cada2f307665e208a486d7ac2294ed9a6f74a6f Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Mon, 9 Mar 2020 16:26:04 +0100
+Subject: pinctrl: qcom: Assign irq_eoi conditionally
+
+From: Linus Walleij <linus.walleij@linaro.org>
+
+commit 1cada2f307665e208a486d7ac2294ed9a6f74a6f upstream.
+
+The hierarchical parts of MSM pinctrl/GPIO is only
+used when the device tree has a "wakeup-parent" as
+a phandle, but the .irq_eoi is anyway assigned leading
+to semantic problems on elder Qualcomm chipsets.
+
+When the drivers/mfd/qcom-pm8xxx.c driver calls
+chained_irq_exit() that call will in turn call chip->irq_eoi()
+which is set to irq_chip_eoi_parent() by default on a
+hierachical IRQ chip, and the parent is pinctrl-msm.c
+so that will in turn unconditionally call
+irq_chip_eoi_parent() again, but its parent is invalid
+so we get the following crash:
+
+ Unnable to handle kernel NULL pointer dereference at
+ virtual address 00000010
+ pgd = (ptrval)
+ [00000010] *pgd=00000000
+ Internal error: Oops: 5 [#1] PREEMPT SMP ARM
+ (...)
+ PC is at irq_chip_eoi_parent+0x4/0x10
+ LR is at pm8xxx_irq_handler+0x1b4/0x2d8
+
+If we solve this crash by avoiding to call up to
+irq_chip_eoi_parent(), the machine will hang and get
+reset by the watchdog, because of semantic issues,
+probably inside irq_chip.
+
+As a solution, just assign the .irq_eoi conditionally if
+we are actually using a wakeup parent.
+
+Cc: David Heidelberg <david@ixit.cz>
+Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
+Cc: Lina Iyer <ilina@codeaurora.org>
+Cc: Stephen Boyd <swboyd@chromium.org>
+Cc: stable@vger.kernel.org
+Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
+Link: https://lore.kernel.org/r/20200306121221.1231296-1-linus.walleij@linaro.org
+Link: https://lore.kernel.org/r/20200309125207.571840-1-linus.walleij@linaro.org
+Link: https://lore.kernel.org/r/20200309152604.585112-1-linus.walleij@linaro.org
+Tested-by: David Heidelberg <david@ixit.cz>
+Acked-by: Marc Zyngier <maz@kernel.org>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pinctrl/qcom/pinctrl-msm.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/pinctrl/qcom/pinctrl-msm.c
++++ b/drivers/pinctrl/qcom/pinctrl-msm.c
+@@ -1104,7 +1104,6 @@ static int msm_gpio_init(struct msm_pinc
+ pctrl->irq_chip.irq_mask = msm_gpio_irq_mask;
+ pctrl->irq_chip.irq_unmask = msm_gpio_irq_unmask;
+ pctrl->irq_chip.irq_ack = msm_gpio_irq_ack;
+- pctrl->irq_chip.irq_eoi = irq_chip_eoi_parent;
+ pctrl->irq_chip.irq_set_type = msm_gpio_irq_set_type;
+ pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake;
+ pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres;
+@@ -1118,7 +1117,7 @@ static int msm_gpio_init(struct msm_pinc
+ if (!chip->irq.parent_domain)
+ return -EPROBE_DEFER;
+ chip->irq.child_to_parent_hwirq = msm_gpio_wakeirq;
+-
++ pctrl->irq_chip.irq_eoi = irq_chip_eoi_parent;
+ /*
+ * Let's skip handling the GPIOs, if the parent irqchip
+ * is handling the direct connect IRQ of the GPIO.
netfilter-x_tables-xt_mttg_seq_next-should-increase-position-index.patch
workqueue-don-t-use-wq_select_unbound_cpu-for-bound-works.patch
drm-amd-display-remove-duplicated-assignment-to-grph_obj_type.patch
+drm-i915-actually-emit-the-await_start.patch
+drm-i915-return-early-for-await_start-on-same-timeline.patch
+drm-i915-be-more-solid-in-checking-the-alignment.patch
+drm-i915-defer-semaphore-priority-bumping-to-a-workqueue.patch
+drm-i915-gt-close-race-between-cacheline_retire-and-free.patch
+drm-i915-execlists-enable-timeslice-on-partial-virtual-engine-dequeue.patch
+mmc-sdhci-pci-gli-enable-msi-interrupt-for-gl975x.patch
+pinctrl-falcon-fix-syntax-error.patch
+pinctrl-qcom-assign-irq_eoi-conditionally.patch
+ktest-add-timeout-for-ssh-sync-testing.patch
+block-fix-partition-support-for-host-aware-zoned-block-devices.patch
+cifs_atomic_open-fix-double-put-on-late-allocation-failure.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
