+2012-08-17 Marc Glisse <marc.glisse@inria.fr>
+
+ * simplify-rtx.c (simplify_binary_operation_1): Optimize shuffle of
+ a concatenation.
+
+
2012-08-17 H.J. Lu <hongjiu.lu@intel.com>
* stor-layout.c (compute_record_mode): Replace
subop0 = XEXP (XEXP (trueop0, i0 / 2), i0 % 2);
subop1 = XEXP (XEXP (trueop0, i1 / 2), i1 % 2);
+ return simplify_gen_binary (VEC_CONCAT, mode, subop0, subop1);
+ }
+
+ if (XVECLEN (trueop1, 0) == 2
+ && CONST_INT_P (XVECEXP (trueop1, 0, 0))
+ && CONST_INT_P (XVECEXP (trueop1, 0, 1))
+ && GET_CODE (trueop0) == VEC_CONCAT
+ && GET_MODE (trueop0) == mode)
+ {
+ unsigned int i0 = INTVAL (XVECEXP (trueop1, 0, 0));
+ unsigned int i1 = INTVAL (XVECEXP (trueop1, 0, 1));
+ rtx subop0, subop1;
+
+ gcc_assert (i0 < 2 && i1 < 2);
+ subop0 = XEXP (trueop0, i0);
+ subop1 = XEXP (trueop0, i1);
+
return simplify_gen_binary (VEC_CONCAT, mode, subop0, subop1);
}
}
+2012-08-17 Marc Glisse <marc.glisse@inria.fr>
+
+ * gcc.target/i386/perm-concat.c: New test.
+
2012-08-17 Julian Brown <julian@codesourcery.com>
* gcc.target/arm/div64-unwinding.c: New test.
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O -mavx -mfpmath=sse" } */
+
+typedef double v2df __attribute__ ((__vector_size__ (16)));
+
+v2df
+f (double d)
+{
+ v2df x = {-d, d};
+ return __builtin_ia32_vpermilpd (x, 1);
+}
+
+/* { dg-final { scan-assembler-not "\tvpermilpd\[ \t\]" } } */