Enable AES-GCM unroll8/unroll12 for Neoverse N3/V3

Reviewed-by: Paul Dale <ppzgs1@gmail.com>
Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com>
(Merged from https://github.com/openssl/openssl/pull/27112)

diff --git a/crypto/arm_arch.h b/crypto/arm_arch.h
index acd8aee4d5195d47775958eac496480e443f396d..00586f212fa33d3789edf3b8aa9ba06959b900c4 100644 (file)
--- a/crypto/arm_arch.h
+++ b/crypto/arm_arch.h
@@ -112,6 +112,8 @@ extern unsigned int OPENSSL_armv8_rsa_neonized;
 # define ARM_CPU_PART_N2           0xD49
 # define HISI_CPU_PART_KP920       0xD01
 # define ARM_CPU_PART_V2           0xD4F
+# define ARM_CPU_PART_N3           0xD8E
+# define ARM_CPU_PART_V3           0xD84
 
 # define APPLE_CPU_PART_M1_ICESTORM         0x022
 # define APPLE_CPU_PART_M1_FIRESTORM        0x023

diff --git a/crypto/armcap.c b/crypto/armcap.c
index 7c5a127523acb339d388f8fd70642e9d674b4b41..d42305b3d5e98c4ecc0e65df836e931311510c79 100644 (file)
--- a/crypto/armcap.c
+++ b/crypto/armcap.c
@@ -422,11 +422,14 @@ void OPENSSL_cpuid_setup(void)
          MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N2) ||
          MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_MICROSOFT, MICROSOFT_CPU_PART_COBALT_100) ||
          MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V2) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_N3) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V3) ||
          MIDR_IMPLEMENTER(OPENSSL_arm_midr) == ARM_CPU_IMP_AMPERE) &&
         (OPENSSL_armcap_P & ARMV8_SHA3))
         OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3;
     if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V1) ||
          MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V2) ||
+         MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V3) ||
          MIDR_IMPLEMENTER(OPENSSL_arm_midr) == ARM_CPU_IMP_AMPERE) &&
         (OPENSSL_armcap_P & ARMV8_SHA3))
         OPENSSL_armcap_P |= ARMV8_UNROLL12_EOR3;