arm64: dts: qcom: x1e80100: describe USB signals properly

Follow example of other platforms. Rename HS graph nodes to contain
'dwc3_hs' and link SS lanes from DWC3 controllers to QMP PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240512-typec-fix-sm8250-v4-8-ad153c747a97@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 5f90a0b3c0166d5bfe78f1a5e56f98abbff6bb61..cf8d8d5b1870a9237fb18a894a36ed5fb3438524 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -2543,6 +2543,33 @@
                        #phy-cells = <1>;
 
                        status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       usb_1_ss0_qmpphy_out: endpoint {
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       usb_1_ss0_qmpphy_usb_ss_in: endpoint {
+                                               remote-endpoint = <&usb_1_ss0_dwc3_ss>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+
+                                       usb_1_ss0_qmpphy_dp_in: endpoint {
+                                       };
+                               };
+                       };
                };
 
                usb_1_ss1_hsphy: phy@fd9000 {
@@ -2583,6 +2610,33 @@
                        #phy-cells = <1>;
 
                        status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       usb_1_ss1_qmpphy_out: endpoint {
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       usb_1_ss1_qmpphy_usb_ss_in: endpoint {
+                                               remote-endpoint = <&usb_1_ss1_dwc3_ss>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+
+                                       usb_1_ss1_qmpphy_dp_in: endpoint {
+                                       };
+                               };
+                       };
                };
 
                usb_1_ss2_hsphy: phy@fde000 {
@@ -2623,6 +2677,33 @@
                        #phy-cells = <1>;
 
                        status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       usb_1_ss2_qmpphy_out: endpoint {
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       usb_1_ss2_qmpphy_usb_ss_in: endpoint {
+                                               remote-endpoint = <&usb_1_ss2_dwc3_ss>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+
+                                       usb_1_ss2_qmpphy_dp_in: endpoint {
+                                       };
+                               };
+                       };
                };
 
                cnoc_main: interconnect@1500000 {
@@ -3445,8 +3526,23 @@
 
                                dma-coherent;
 
-                               port {
-                                       usb_1_ss2_role_switch: endpoint {
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       port@0 {
+                                               reg = <0>;
+
+                                               usb_1_ss2_dwc3_hs: endpoint {
+                                               };
+                                       };
+
+                                       port@1 {
+                                               reg = <1>;
+
+                                               usb_1_ss2_dwc3_ss: endpoint {
+                                                       remote-endpoint = <&usb_1_ss2_qmpphy_usb_ss_in>;
+                                               };
                                        };
                                };
                        };
@@ -3514,8 +3610,15 @@
                                phy-names = "usb2-phy";
                                maximum-speed = "high-speed";
 
-                               port {
-                                       usb_2_role_switch: endpoint {
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       port@0 {
+                                               reg = <0>;
+
+                                               usb_2_dwc3_hs: endpoint {
+                                               };
                                        };
                                };
                        };
@@ -3590,8 +3693,23 @@
 
                                dma-coherent;
 
-                               port {
-                                       usb_1_ss0_role_switch: endpoint {
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       port@0 {
+                                               reg = <0>;
+
+                                               usb_1_ss0_dwc3_hs: endpoint {
+                                               };
+                                       };
+
+                                       port@1 {
+                                               reg = <1>;
+
+                                               usb_1_ss0_dwc3_ss: endpoint {
+                                                       remote-endpoint = <&usb_1_ss0_qmpphy_usb_ss_in>;
+                                               };
                                        };
                                };
                        };
@@ -3673,8 +3791,23 @@
 
                                dma-coherent;
 
-                               port {
-                                       usb_1_ss1_role_switch: endpoint {
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       port@0 {
+                                               reg = <0>;
+
+                                               usb_1_ss1_dwc3_hs: endpoint {
+                                               };
+                                       };
+
+                                       port@1 {
+                                               reg = <1>;
+
+                                               usb_1_ss1_dwc3_ss: endpoint {
+                                                       remote-endpoint = <&usb_1_ss1_qmpphy_usb_ss_in>;
+                                               };
                                        };
                                };
                        };