RISC-V: KVM: Rename and move kvm_riscv_local_tlb_sanitize()

The kvm_riscv_local_tlb_sanitize() deals with sanitizing current
VMID related TLB mappings when a VCPU is moved from one host CPU
to another.

Let's move kvm_riscv_local_tlb_sanitize() to VMID management
sources and rename it to kvm_riscv_gstage_vmid_sanitize().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com>
Link: https://lore.kernel.org/r/20250618113532.471448-4-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>

diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
index 041bbdb36ebcb3c76c7bb33a9d218789563c8ff1..66195d7cbb1792a00a6d36a4876552f3234d5dc6 100644 (file)
--- a/arch/riscv/include/asm/kvm_host.h
+++ b/arch/riscv/include/asm/kvm_host.h
@@ -330,8 +330,6 @@ void kvm_riscv_local_hfence_vvma_gva(unsigned long vmid,
                                     unsigned long order);
 void kvm_riscv_local_hfence_vvma_all(unsigned long vmid);
 
-void kvm_riscv_local_tlb_sanitize(struct kvm_vcpu *vcpu);
-
 void kvm_riscv_fence_i_process(struct kvm_vcpu *vcpu);
 void kvm_riscv_hfence_gvma_vmid_all_process(struct kvm_vcpu *vcpu);
 void kvm_riscv_hfence_vvma_all_process(struct kvm_vcpu *vcpu);
@@ -379,6 +377,7 @@ unsigned long kvm_riscv_gstage_vmid_bits(void);
 int kvm_riscv_gstage_vmid_init(struct kvm *kvm);
 bool kvm_riscv_gstage_vmid_ver_changed(struct kvm_vmid *vmid);
 void kvm_riscv_gstage_vmid_update(struct kvm_vcpu *vcpu);
+void kvm_riscv_gstage_vmid_sanitize(struct kvm_vcpu *vcpu);
 
 int kvm_riscv_setup_default_irq_routing(struct kvm *kvm, u32 lines);
 

diff --git a/arch/riscv/kvm/tlb.c b/arch/riscv/kvm/tlb.c
index 2f91ea5f8493253ea6eb68a3e75047c20830e57c..b3461bfd9756fbcaa735b7fac1e6e80e5e8ed1f1 100644 (file)
--- a/arch/riscv/kvm/tlb.c
+++ b/arch/riscv/kvm/tlb.c
@@ -156,29 +156,6 @@ void kvm_riscv_local_hfence_vvma_all(unsigned long vmid)
        csr_write(CSR_HGATP, hgatp);
 }
 
-void kvm_riscv_local_tlb_sanitize(struct kvm_vcpu *vcpu)
-{
-       unsigned long vmid;
-
-       if (!kvm_riscv_gstage_vmid_bits() ||
-           vcpu->arch.last_exit_cpu == vcpu->cpu)
-               return;
-
-       /*
-        * On RISC-V platforms with hardware VMID support, we share same
-        * VMID for all VCPUs of a particular Guest/VM. This means we might
-        * have stale G-stage TLB entries on the current Host CPU due to
-        * some other VCPU of the same Guest which ran previously on the
-        * current Host CPU.
-        *
-        * To cleanup stale TLB entries, we simply flush all G-stage TLB
-        * entries by VMID whenever underlying Host CPU changes for a VCPU.
-        */
-
-       vmid = READ_ONCE(vcpu->kvm->arch.vmid.vmid);
-       kvm_riscv_local_hfence_gvma_vmid_all(vmid);
-}
-
 void kvm_riscv_fence_i_process(struct kvm_vcpu *vcpu)
 {
        kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_FENCE_I_RCVD);

diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index f203a67a3bc8cecdcb25b71d5ae85cb7b06d08ba..6ba62c62cd7e6c737671732aea0d011ed4238080 100644 (file)
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -952,12 +952,12 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
                }
 
                /*
-                * Cleanup stale TLB enteries
+                * Sanitize VMID mappings cached (TLB) on current CPU
                 *
                 * Note: This should be done after G-stage VMID has been
                 * updated using kvm_riscv_gstage_vmid_ver_changed()
                 */
-               kvm_riscv_local_tlb_sanitize(vcpu);
+               kvm_riscv_gstage_vmid_sanitize(vcpu);
 
                trace_kvm_entry(vcpu);
 

diff --git a/arch/riscv/kvm/vmid.c b/arch/riscv/kvm/vmid.c
index ddc98714ce8edf2a3f70270d3892010f2e1afdb3..92c01255f86fce6fb03086600430653be98380f1 100644 (file)
--- a/arch/riscv/kvm/vmid.c
+++ b/arch/riscv/kvm/vmid.c
@@ -122,3 +122,26 @@ void kvm_riscv_gstage_vmid_update(struct kvm_vcpu *vcpu)
        kvm_for_each_vcpu(i, v, vcpu->kvm)
                kvm_make_request(KVM_REQ_UPDATE_HGATP, v);
 }
+
+void kvm_riscv_gstage_vmid_sanitize(struct kvm_vcpu *vcpu)
+{
+       unsigned long vmid;
+
+       if (!kvm_riscv_gstage_vmid_bits() ||
+           vcpu->arch.last_exit_cpu == vcpu->cpu)
+               return;
+
+       /*
+        * On RISC-V platforms with hardware VMID support, we share same
+        * VMID for all VCPUs of a particular Guest/VM. This means we might
+        * have stale G-stage TLB entries on the current Host CPU due to
+        * some other VCPU of the same Guest which ran previously on the
+        * current Host CPU.
+        *
+        * To cleanup stale TLB entries, we simply flush all G-stage TLB
+        * entries by VMID whenever underlying Host CPU changes for a VCPU.
+        */
+
+       vmid = READ_ONCE(vcpu->kvm->arch.vmid.vmid);
+       kvm_riscv_local_hfence_gvma_vmid_all(vmid);
+}