ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode

Revise quad mode to dual mode to keep the write protect feature for the
SPI flash because the WP pin is the same pin with IO2 pin in quad mode.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240924094430.272074-2-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index b31ee5d6294ecd8530b24f6cdf407b03715c3c0a..0ae00e07d1b4eb90136f3d09ae0ce8507b705823 100644 (file)
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -130,7 +130,8 @@
                status = "okay";
                m25p,fast-read;
                label = "bmc";
-               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <2>;
+               spi-rx-bus-width = <2>;
                spi-max-frequency = <50000000>;
 #include "openbmc-flash-layout-64.dtsi"
        };
@@ -138,7 +139,8 @@
                status = "okay";
                m25p,fast-read;
                label = "bmc2";
-               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <2>;
+               spi-rx-bus-width = <2>;
                spi-max-frequency = <50000000>;
        };
 };