drm/amdgpu: extend PSP FW loading support to 8 SDMA instances

Arcturus has 8 instances of SDMA.  Update host to PSP interface
to handle it.

Signed-off-by: John Clements <john.clements@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 18454ff64db2c8f9963319bf66bdfcc0d2825b18..314e7cbabc87c610d099445515294c756daef825 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -833,7 +833,6 @@ static int psp_hw_start(struct psp_context *psp)
                                "XGMI: Failed to initialize XGMI session\n");
        }
 
-
        if (psp->adev->psp.ta_fw) {
                ret = psp_ras_initialize(psp);
                if (ret)
@@ -854,6 +853,24 @@ static int psp_get_fw_type(struct amdgpu_firmware_info *ucode,
        case AMDGPU_UCODE_ID_SDMA1:
                *type = GFX_FW_TYPE_SDMA1;
                break;
+       case AMDGPU_UCODE_ID_SDMA2:
+               *type = GFX_FW_TYPE_SDMA2;
+               break;
+       case AMDGPU_UCODE_ID_SDMA3:
+               *type = GFX_FW_TYPE_SDMA3;
+               break;
+       case AMDGPU_UCODE_ID_SDMA4:
+               *type = GFX_FW_TYPE_SDMA4;
+               break;
+       case AMDGPU_UCODE_ID_SDMA5:
+               *type = GFX_FW_TYPE_SDMA5;
+               break;
+       case AMDGPU_UCODE_ID_SDMA6:
+               *type = GFX_FW_TYPE_SDMA6;
+               break;
+       case AMDGPU_UCODE_ID_SDMA7:
+               *type = GFX_FW_TYPE_SDMA7;
+               break;
        case AMDGPU_UCODE_ID_CP_CE:
                *type = GFX_FW_TYPE_CP_CE;
                break;
@@ -982,12 +999,20 @@ out:
                if (ucode->ucode_id == AMDGPU_UCODE_ID_SMC &&
                    (psp_smu_reload_quirk(psp) || psp->autoload_supported))
                        continue;
+
                if (amdgpu_sriov_vf(adev) &&
                   (ucode->ucode_id == AMDGPU_UCODE_ID_SDMA0
                    || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1
+                   || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2
+                   || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3
+                   || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA4
+                   || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA5
+                   || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA6
+                   || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA7
                    || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G))
                        /*skip ucode loading in SRIOV VF */
                        continue;
+
                if (psp->autoload_supported &&
                    (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT ||
                     ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT))

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index 4f1b167a9394a60aba6e821dbae87f792a9c90a8..b34f00d420499d447ceb26464b687247edd891d6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -271,6 +271,12 @@ union amdgpu_firmware_header {
 enum AMDGPU_UCODE_ID {
        AMDGPU_UCODE_ID_SDMA0 = 0,
        AMDGPU_UCODE_ID_SDMA1,
+       AMDGPU_UCODE_ID_SDMA2,
+       AMDGPU_UCODE_ID_SDMA3,
+       AMDGPU_UCODE_ID_SDMA4,
+       AMDGPU_UCODE_ID_SDMA5,
+       AMDGPU_UCODE_ID_SDMA6,
+       AMDGPU_UCODE_ID_SDMA7,
        AMDGPU_UCODE_ID_CP_CE,
        AMDGPU_UCODE_ID_CP_PFP,
        AMDGPU_UCODE_ID_CP_ME,

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
index 5080a73a95a534e55e7f8d8650738c7641c3798d..74a9fe8e0cfb92e2cae2ed3e71bfc358b861079a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
@@ -233,8 +233,15 @@ enum psp_gfx_fw_type {
        GFX_FW_TYPE_RLCP_CAM                        = 46,   /* RLCP CAM                 NV      */
        GFX_FW_TYPE_RLC_SPP_CAM_EXT                 = 47,   /* RLC SPP CAM EXT          NV      */
        GFX_FW_TYPE_RLX6_DRAM_BOOT                  = 48,   /* RLX6 DRAM BOOT           NV      */
-       GFX_FW_TYPE_VCN0_RAM                        = 49,   /* VCN_RAM  NV */
-       GFX_FW_TYPE_VCN1_RAM                        = 50,   /* VCN_RAM  NV */
+       GFX_FW_TYPE_VCN0_RAM                        = 49,   /* VCN_RAM                  NV + RN */
+       GFX_FW_TYPE_VCN1_RAM                        = 50,   /* VCN_RAM                  NV + RN */
+       GFX_FW_TYPE_DMUB                            = 51,   /* DMUB                          RN */
+       GFX_FW_TYPE_SDMA2                           = 52,   /* SDMA2                    MI      */
+       GFX_FW_TYPE_SDMA3                           = 53,   /* SDMA3                    MI      */
+       GFX_FW_TYPE_SDMA4                           = 54,   /* SDMA4                    MI      */
+       GFX_FW_TYPE_SDMA5                           = 55,   /* SDMA5                    MI      */
+       GFX_FW_TYPE_SDMA6                           = 56,   /* SDMA6                    MI      */
+       GFX_FW_TYPE_SDMA7                           = 57,   /* SDMA7                    MI      */
        GFX_FW_TYPE_MAX
 };