]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: add NXP i.MX8MM-EVKB support
authorJohannes Schneider <johannes.schneider@leica-geosystems.com>
Wed, 3 May 2023 15:20:05 +0000 (17:20 +0200)
committerShawn Guo <shawnguo@kernel.org>
Sun, 14 May 2023 13:07:32 +0000 (21:07 +0800)
Add the i.MX8MM-EVKB [1] devicetree support. The EVKB is basically the
same device except for the different used PMIC.

[1] https://www.nxp.com/design/development-boards/ \
        i-mx-evaluation-and-development-boards/ \
evaluation-kit-for-the-i-mx-8m-mini-applications-processor:8MMINILPD4-EVK

Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
[m.felsch@pengutronix.de: Adapt the commit message]
[m.felsch@pengutronix.de: Include Shawns feedback]
[m.felsch@pengutronix.de: Fix the regulator settings]
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/imx8mm-evkb.dts [new file with mode: 0644]

index ef7d17aef58f0adeacb8d4f8cfc1a7382950ed44..0a6a646712a5422bc497d6f247a783ef666532b1 100644 (file)
@@ -55,6 +55,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-data-modul-edm-sbc.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-ddr4-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-emcon-avari.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mm-evkb.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-ctouch2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-icore-mx8mm-edimm2.2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mm-innocomm-wb15-evk.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evkb.dts b/arch/arm64/boot/dts/freescale/imx8mm-evkb.dts
new file mode 100644 (file)
index 0000000..164df62
--- /dev/null
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019-2020 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8mm-evk.dtsi"
+
+/ {
+       model = "FSL i.MX8MM EVKB";
+       compatible = "fsl,imx8mm-evkb", "fsl,imx8mm";
+};
+
+&i2c1 {
+       /delete-node/ pmic@4b;
+
+       pmic@25 {
+               compatible = "nxp,pca9450a";
+               reg = <0x25>;
+               pinctrl-0 = <&pinctrl_pmic>;
+               pinctrl-names = "default";
+               interrupt-parent = <&gpio1>;
+               interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+
+               regulators {
+                       /* VDD_SOC with PCIe */
+                       buck1_reg: BUCK1 {
+                               regulator-name = "BUCK1";
+                               regulator-min-microvolt = <850000>;
+                               regulator-max-microvolt = <850000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <3125>;
+                       };
+
+                       /* VDD_ARM */
+                       buck2_reg: BUCK2 {
+                               regulator-name = "BUCK2";
+                               regulator-min-microvolt = <850000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <3125>;
+                               nxp,dvs-standby-voltage = <850000>;
+                       };
+
+                       /* VDD_GPU, VDD_VPU, VDD_DRAM */
+                       buck3_reg: BUCK3 {
+                               regulator-name = "BUCK3";
+                               regulator-min-microvolt = <850000>;
+                               regulator-max-microvolt = <1000000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* NVCC_3V3 */
+                       buck4_reg: BUCK4 {
+                               regulator-name = "BUCK4";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* VDD_1V8, NVCC_1V8, NVCC_ENET */
+                       buck5_reg: BUCK5 {
+                               regulator-name = "BUCK5";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* NVCC_DRAM for LPDDR4 */
+                       buck6_reg: BUCK6 {
+                               regulator-name = "BUCK6";
+                               regulator-min-microvolt = <1100000>;
+                               regulator-max-microvolt = <1100000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* NVCC_SNVS_1P8 */
+                       ldo1_reg: LDO1 {
+                               regulator-name = "LDO1";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* VDD_SNVS_0P8 */
+                       ldo2_reg: LDO2 {
+                               regulator-name = "LDO2";
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* VDD_*_1V8 */
+                       ldo3_reg: LDO3 {
+                               regulator-name = "LDO3";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* VDD_PHY_0V9 */
+                       ldo4_reg: LDO4 {
+                               regulator-name = "LDO4";
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <900000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       /* NVCC_SD2 */
+                       ldo5_reg: LDO5 {
+                               regulator-name = "LDO5";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+               };
+       };
+};