We won't use the SSE GFNI instructions, so delay
detection until we know AVX is present.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
#define CPUINFO_ATOMIC_VMOVDQU (1u << 17)
#define CPUINFO_AES (1u << 18)
#define CPUINFO_PCLMUL (1u << 19)
+#define CPUINFO_GFNI (1u << 20)
/* Initialized with a constructor. */
extern unsigned cpuinfo;
#ifndef bit_AVX512VBMI2
#define bit_AVX512VBMI2 (1 << 6)
#endif
+#ifndef bit_GFNI
+#define bit_GFNI (1 << 8)
+#endif
/* Leaf 0x80000001, %ecx */
#ifndef bit_LZCNT
if ((bv & 6) == 6) {
info |= CPUINFO_AVX1;
info |= (b7 & bit_AVX2 ? CPUINFO_AVX2 : 0);
+ info |= (c7 & bit_GFNI ? CPUINFO_GFNI : 0);
if ((bv & 0xe0) == 0xe0) {
info |= (b7 & bit_AVX512F ? CPUINFO_AVX512F : 0);