]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
ARM: dts: renesas: Clean up R8A779G0 V4H RPC SPI DT node
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Mon, 19 Jun 2023 22:41:49 +0000 (00:41 +0200)
committerMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 2 Dec 2023 16:16:01 +0000 (17:16 +0100)
Use the phandle reference to &rpc node in arch/arm/dts/r8a779g0.dtsi
and remove properties which are already in arch/arm/dts/r8a779g0.dtsi.
No functional change and no resulting DT change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
arch/arm/dts/r8a779g0-u-boot.dtsi

index 150657fad54c1c591744a37864e81da8b90eebb9..cc8becac9961358d31ff0d4c15f84078b2a0d194 100644 (file)
@@ -7,20 +7,10 @@
 
 #include "r8a779x-u-boot.dtsi"
 
-/ {
-       soc {
-               rpc: spi@ee200000 {
-                       compatible = "renesas,r8a779g0-rpc-if", "renesas,rcar-gen4-rpc-if";
-                       reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>;
-                       interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 629>;
-                       power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
-                       resets = <&cpg 629>;
-                       bank-width = <2>;
-                       num-cs = <1>;
-                       status = "disabled";
-               };
-       };
+&rpc {
+       reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x04000000>;
+       bank-width = <2>;
+       num-cs = <1>;
 };
 
 &extalr_clk {