]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
mtd: spinand: esmt: add support for F50L1G41LC
authorDaniel Golle <daniel@makrotopia.org>
Mon, 17 Nov 2025 02:54:19 +0000 (02:54 +0000)
committerMiquel Raynal <miquel.raynal@bootlin.com>
Mon, 17 Nov 2025 10:53:08 +0000 (11:53 +0100)
This adds support for ESMT F50L1G41LC, which appears to be an updated
version of the already supported F50L1G41LB.
Add esmt_8c SPI_NAND manufacturer to account for the newly used vendor
ID with support for the ESMT F50L1G41LC chip.

Link: https://github.com/openwrt/openwrt/pull/15214#issuecomment-3514824435
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
drivers/mtd/nand/spi/core.c
drivers/mtd/nand/spi/esmt.c
include/linux/mtd/spinand.h

index f92133b8e1a60636f48ec71a5334dd4b84e3c330..d207286572d878f2e36ea3efb44069a808b36495 100644 (file)
@@ -1227,6 +1227,7 @@ static const struct nand_ops spinand_ops = {
 static const struct spinand_manufacturer *spinand_manufacturers[] = {
        &alliancememory_spinand_manufacturer,
        &ato_spinand_manufacturer,
+       &esmt_8c_spinand_manufacturer,
        &esmt_c8_spinand_manufacturer,
        &fmsh_spinand_manufacturer,
        &foresee_spinand_manufacturer,
index 9a9325c0bc49726b0421d77680684ae07560bf2e..e60e4ac1fd6fb1c08460926bb4e4c5c3b879a617 100644 (file)
@@ -12,6 +12,7 @@
 
 /* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
 #define SPINAND_MFR_ESMT_C8                    0xc8
+#define SPINAND_MFR_ESMT_8C                    0x8c
 
 #define ESMT_F50L1G41LB_CFG_OTP_PROTECT                BIT(7)
 #define ESMT_F50L1G41LB_CFG_OTP_LOCK           \
@@ -184,6 +185,21 @@ static const struct spinand_fact_otp_ops f50l1g41lb_fact_otp_ops = {
        .read = spinand_fact_otp_read,
 };
 
+
+static const struct spinand_info esmt_8c_spinand_table[] = {
+       SPINAND_INFO("F50L1G41LC",
+                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x2C),
+                    NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+                    NAND_ECCREQ(1, 512),
+                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+                                             &write_cache_variants,
+                                             &update_cache_variants),
+                    0,
+                    SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL),
+                    SPINAND_USER_OTP_INFO(28, 2, &f50l1g41lb_user_otp_ops),
+                    SPINAND_FACT_OTP_INFO(2, 0, &f50l1g41lb_fact_otp_ops)),
+};
+
 static const struct spinand_info esmt_c8_spinand_table[] = {
        SPINAND_INFO("F50L1G41LB",
                     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f,
@@ -224,6 +240,14 @@ static const struct spinand_info esmt_c8_spinand_table[] = {
 static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
 };
 
+const struct spinand_manufacturer esmt_8c_spinand_manufacturer = {
+       .id = SPINAND_MFR_ESMT_8C,
+       .name = "ESMT",
+       .chips = esmt_8c_spinand_table,
+       .nchips = ARRAY_SIZE(esmt_8c_spinand_table),
+       .ops = &esmt_spinand_manuf_ops,
+};
+
 const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
        .id = SPINAND_MFR_ESMT_C8,
        .name = "ESMT",
index 927c10d7876958276a841a9f1278a74deeb89944..ce76f5c632e179e58d126f23d590fe7093a79d89 100644 (file)
@@ -354,6 +354,7 @@ struct spinand_manufacturer {
 /* SPI NAND manufacturers */
 extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
 extern const struct spinand_manufacturer ato_spinand_manufacturer;
+extern const struct spinand_manufacturer esmt_8c_spinand_manufacturer;
 extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
 extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
 extern const struct spinand_manufacturer foresee_spinand_manufacturer;