Implement DC /3 (FCOMP double-real).

git-svn-id: svn://svn.valgrind.org/vex/trunk@1323

diff --git a/VEX/priv/guest-amd64/toIR.c b/VEX/priv/guest-amd64/toIR.c
index e27e2b81ec359573eed6d0b39cd4fb2adc125877..5899a1918412c4c2c3d0f696d277a53520184bfb 100644 (file)
--- a/VEX/priv/guest-amd64/toIR.c
+++ b/VEX/priv/guest-amd64/toIR.c
@@ -5150,21 +5150,22 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok,
 //..                           mkU32(0x4500)
 //..                    ));
 //..                break;  
-//.. 
-//..             case 3: /* FCOMP double-real */
-//..                DIP("fcompl %s\n", dis_buf);
-//..                /* This forces C1 to zero, which isn't right. */
-//..                put_C3210( 
-//..                    binop( Iop_And32,
-//..                           binop(Iop_Shl32, 
-//..                                 binop(Iop_CmpF64, 
-//..                                       get_ST(0),
-//..                                       loadLE(Ity_F64,mkexpr(addr))),
-//..                                 mkU8(8)),
-//..                           mkU32(0x4500)
-//..                    ));
-//..                fp_pop();
-//..                break;  
+
+            case 3: /* FCOMP double-real */
+               DIP("fcompl %s\n", dis_buf);
+               /* This forces C1 to zero, which isn't right. */
+               put_C3210( 
+                   unop(Iop_32Uto64,
+                   binop( Iop_And32,
+                          binop(Iop_Shl32, 
+                                binop(Iop_CmpF64, 
+                                      get_ST(0),
+                                      loadLE(Ity_F64,mkexpr(addr))),
+                                mkU8(8)),
+                          mkU32(0x4500)
+                   )));
+               fp_pop();
+               break;  
 
             case 4: /* FSUB double-real */
                fp_do_op_mem_ST_0 ( addr, "sub", dis_buf, Iop_SubF64, True );