--- /dev/null
+From b4cd966edb2deb5c75fe356191422e127445b830 Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 12 Feb 2025 18:03:52 +0100
+Subject: arm64: dts: qcom: ipq9574: Add missing properties for cryptobam
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit b4cd966edb2deb5c75fe356191422e127445b830 upstream.
+
+num-channels and qcom,num-ees are required for BAM nodes without clock,
+because the driver cannot ensure the hardware is powered on when trying to
+obtain the information from the hardware registers. Specifying the node
+without these properties is unsafe and has caused early boot crashes for
+other SoCs before [1, 2].
+
+Add the missing information from the hardware registers to ensure the
+driver can probe successfully without causing crashes.
+
+[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/
+[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/
+
+Cc: stable@vger.kernel.org
+Tested-by: Md Sadre Alam <quic_mdalam@quicinc.com>
+Fixes: ffadc79ed99f ("arm64: dts: qcom: ipq9574: Enable crypto nodes")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-6-f560889e65d8@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+@@ -378,6 +378,8 @@
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <1>;
++ qcom,num-ees = <4>;
++ num-channels = <16>;
+ qcom,controlled-remotely;
+ };
+
--- /dev/null
+From a2517331f11bd22cded60e791a8818cec3e7597a Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 12 Feb 2025 18:03:51 +0100
+Subject: arm64: dts: qcom: sa8775p: Add missing properties for cryptobam
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit a2517331f11bd22cded60e791a8818cec3e7597a upstream.
+
+num-channels and qcom,num-ees are required for BAM nodes without clock,
+because the driver cannot ensure the hardware is powered on when trying to
+obtain the information from the hardware registers. Specifying the node
+without these properties is unsafe and has caused early boot crashes for
+other SoCs before [1, 2].
+
+Add the missing information from the hardware registers to ensure the
+driver can probe successfully without causing crashes.
+
+[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/
+[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/
+
+Cc: stable@vger.kernel.org
+Fixes: 7ff3da43ef44 ("arm64: dts: qcom: sa8775p: add QCrypto nodes")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-5-f560889e65d8@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+index 23049cc58896..6a2c49047df5 100644
+--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
++++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+@@ -2413,6 +2413,8 @@ cryptobam: dma-controller@1dc4000 {
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
++ qcom,num-ees = <4>;
++ num-channels = <20>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x480 0x00>,
+ <&apps_smmu 0x481 0x00>;
+--
+2.49.0
+
--- /dev/null
+From d180c2bd3b43d55f30c9b99de68bc6bb8420d1c1 Mon Sep 17 00:00:00 2001
+From: Karthik Sanagavarapu <quic_kartsana@quicinc.com>
+Date: Tue, 11 Feb 2025 13:44:15 +0530
+Subject: arm64: dts: qcom: sa8775p: Remove cdsp compute-cb@10
+
+From: Karthik Sanagavarapu <quic_kartsana@quicinc.com>
+
+commit d180c2bd3b43d55f30c9b99de68bc6bb8420d1c1 upstream.
+
+Remove the context bank compute-cb@10 because these SMMU ids are S2-only
+which is not used for S1 transaction.
+
+Fixes: f7b01bfb4b47 ("arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodes")
+Cc: stable@kernel.org
+Signed-off-by: Karthik Sanagavarapu <quic_kartsana@quicinc.com>
+Signed-off-by: Ling Xu <quic_lxu5@quicinc.com>
+Link: https://lore.kernel.org/r/4c9de858fda7848b77ea8c528c9b9d53600ad21a.1739260973.git.quic_lxu5@quicinc.com
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 8 --------
+ 1 file changed, 8 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
++++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+@@ -4973,14 +4973,6 @@
+ dma-coherent;
+ };
+
+- compute-cb@10 {
+- compatible = "qcom,fastrpc-compute-cb";
+- reg = <10>;
+- iommus = <&apps_smmu 0x214a 0x04a0>,
+- <&apps_smmu 0x218a 0x0400>;
+- dma-coherent;
+- };
+-
+ compute-cb@11 {
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <11>;
--- /dev/null
+From eb73f500548a3205741330cbd7d0e209a7a6a9af Mon Sep 17 00:00:00 2001
+From: Ling Xu <quic_lxu5@quicinc.com>
+Date: Tue, 11 Feb 2025 13:44:14 +0530
+Subject: arm64: dts: qcom: sa8775p: Remove extra entries from the iommus property
+
+From: Ling Xu <quic_lxu5@quicinc.com>
+
+commit eb73f500548a3205741330cbd7d0e209a7a6a9af upstream.
+
+There are some items come out to be same value if we do SID & ~MASK.
+Remove extra entries from the iommus property for sa8775p to simplify.
+
+Fixes: f7b01bfb4b47 ("arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodes")
+Cc: stable@kernel.org
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Signed-off-by: Ling Xu <quic_lxu5@quicinc.com>
+Link: https://lore.kernel.org/r/49f463415c8fa2b08fbc2317e31493362056f403.1739260973.git.quic_lxu5@quicinc.com
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/sa8775p.dtsi | 240 +++-------------------------------
+ 1 file changed, 24 insertions(+), 216 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
++++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+@@ -4905,15 +4905,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x2141 0x04a0>,
+- <&apps_smmu 0x2161 0x04a0>,
+- <&apps_smmu 0x2181 0x0400>,
+- <&apps_smmu 0x21c1 0x04a0>,
+- <&apps_smmu 0x21e1 0x04a0>,
+- <&apps_smmu 0x2541 0x04a0>,
+- <&apps_smmu 0x2561 0x04a0>,
+- <&apps_smmu 0x2581 0x0400>,
+- <&apps_smmu 0x25c1 0x04a0>,
+- <&apps_smmu 0x25e1 0x04a0>;
++ <&apps_smmu 0x2181 0x0400>;
+ dma-coherent;
+ };
+
+@@ -4921,15 +4913,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x2142 0x04a0>,
+- <&apps_smmu 0x2162 0x04a0>,
+- <&apps_smmu 0x2182 0x0400>,
+- <&apps_smmu 0x21c2 0x04a0>,
+- <&apps_smmu 0x21e2 0x04a0>,
+- <&apps_smmu 0x2542 0x04a0>,
+- <&apps_smmu 0x2562 0x04a0>,
+- <&apps_smmu 0x2582 0x0400>,
+- <&apps_smmu 0x25c2 0x04a0>,
+- <&apps_smmu 0x25e2 0x04a0>;
++ <&apps_smmu 0x2182 0x0400>;
+ dma-coherent;
+ };
+
+@@ -4937,15 +4921,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x2143 0x04a0>,
+- <&apps_smmu 0x2163 0x04a0>,
+- <&apps_smmu 0x2183 0x0400>,
+- <&apps_smmu 0x21c3 0x04a0>,
+- <&apps_smmu 0x21e3 0x04a0>,
+- <&apps_smmu 0x2543 0x04a0>,
+- <&apps_smmu 0x2563 0x04a0>,
+- <&apps_smmu 0x2583 0x0400>,
+- <&apps_smmu 0x25c3 0x04a0>,
+- <&apps_smmu 0x25e3 0x04a0>;
++ <&apps_smmu 0x2183 0x0400>;
+ dma-coherent;
+ };
+
+@@ -4953,15 +4929,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+ iommus = <&apps_smmu 0x2144 0x04a0>,
+- <&apps_smmu 0x2164 0x04a0>,
+- <&apps_smmu 0x2184 0x0400>,
+- <&apps_smmu 0x21c4 0x04a0>,
+- <&apps_smmu 0x21e4 0x04a0>,
+- <&apps_smmu 0x2544 0x04a0>,
+- <&apps_smmu 0x2564 0x04a0>,
+- <&apps_smmu 0x2584 0x0400>,
+- <&apps_smmu 0x25c4 0x04a0>,
+- <&apps_smmu 0x25e4 0x04a0>;
++ <&apps_smmu 0x2184 0x0400>;
+ dma-coherent;
+ };
+
+@@ -4969,15 +4937,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+ iommus = <&apps_smmu 0x2145 0x04a0>,
+- <&apps_smmu 0x2165 0x04a0>,
+- <&apps_smmu 0x2185 0x0400>,
+- <&apps_smmu 0x21c5 0x04a0>,
+- <&apps_smmu 0x21e5 0x04a0>,
+- <&apps_smmu 0x2545 0x04a0>,
+- <&apps_smmu 0x2565 0x04a0>,
+- <&apps_smmu 0x2585 0x0400>,
+- <&apps_smmu 0x25c5 0x04a0>,
+- <&apps_smmu 0x25e5 0x04a0>;
++ <&apps_smmu 0x2185 0x0400>;
+ dma-coherent;
+ };
+
+@@ -4985,15 +4945,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+ iommus = <&apps_smmu 0x2146 0x04a0>,
+- <&apps_smmu 0x2166 0x04a0>,
+- <&apps_smmu 0x2186 0x0400>,
+- <&apps_smmu 0x21c6 0x04a0>,
+- <&apps_smmu 0x21e6 0x04a0>,
+- <&apps_smmu 0x2546 0x04a0>,
+- <&apps_smmu 0x2566 0x04a0>,
+- <&apps_smmu 0x2586 0x0400>,
+- <&apps_smmu 0x25c6 0x04a0>,
+- <&apps_smmu 0x25e6 0x04a0>;
++ <&apps_smmu 0x2186 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5001,15 +4953,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <7>;
+ iommus = <&apps_smmu 0x2147 0x04a0>,
+- <&apps_smmu 0x2167 0x04a0>,
+- <&apps_smmu 0x2187 0x0400>,
+- <&apps_smmu 0x21c7 0x04a0>,
+- <&apps_smmu 0x21e7 0x04a0>,
+- <&apps_smmu 0x2547 0x04a0>,
+- <&apps_smmu 0x2567 0x04a0>,
+- <&apps_smmu 0x2587 0x0400>,
+- <&apps_smmu 0x25c7 0x04a0>,
+- <&apps_smmu 0x25e7 0x04a0>;
++ <&apps_smmu 0x2187 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5017,15 +4961,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <8>;
+ iommus = <&apps_smmu 0x2148 0x04a0>,
+- <&apps_smmu 0x2168 0x04a0>,
+- <&apps_smmu 0x2188 0x0400>,
+- <&apps_smmu 0x21c8 0x04a0>,
+- <&apps_smmu 0x21e8 0x04a0>,
+- <&apps_smmu 0x2548 0x04a0>,
+- <&apps_smmu 0x2568 0x04a0>,
+- <&apps_smmu 0x2588 0x0400>,
+- <&apps_smmu 0x25c8 0x04a0>,
+- <&apps_smmu 0x25e8 0x04a0>;
++ <&apps_smmu 0x2188 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5033,15 +4969,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <9>;
+ iommus = <&apps_smmu 0x2149 0x04a0>,
+- <&apps_smmu 0x2169 0x04a0>,
+- <&apps_smmu 0x2189 0x0400>,
+- <&apps_smmu 0x21c9 0x04a0>,
+- <&apps_smmu 0x21e9 0x04a0>,
+- <&apps_smmu 0x2549 0x04a0>,
+- <&apps_smmu 0x2569 0x04a0>,
+- <&apps_smmu 0x2589 0x0400>,
+- <&apps_smmu 0x25c9 0x04a0>,
+- <&apps_smmu 0x25e9 0x04a0>;
++ <&apps_smmu 0x2189 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5049,15 +4977,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <10>;
+ iommus = <&apps_smmu 0x214a 0x04a0>,
+- <&apps_smmu 0x216a 0x04a0>,
+- <&apps_smmu 0x218a 0x0400>,
+- <&apps_smmu 0x21ca 0x04a0>,
+- <&apps_smmu 0x21ea 0x04a0>,
+- <&apps_smmu 0x254a 0x04a0>,
+- <&apps_smmu 0x256a 0x04a0>,
+- <&apps_smmu 0x258a 0x0400>,
+- <&apps_smmu 0x25ca 0x04a0>,
+- <&apps_smmu 0x25ea 0x04a0>;
++ <&apps_smmu 0x218a 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5065,15 +4985,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <11>;
+ iommus = <&apps_smmu 0x214b 0x04a0>,
+- <&apps_smmu 0x216b 0x04a0>,
+- <&apps_smmu 0x218b 0x0400>,
+- <&apps_smmu 0x21cb 0x04a0>,
+- <&apps_smmu 0x21eb 0x04a0>,
+- <&apps_smmu 0x254b 0x04a0>,
+- <&apps_smmu 0x256b 0x04a0>,
+- <&apps_smmu 0x258b 0x0400>,
+- <&apps_smmu 0x25cb 0x04a0>,
+- <&apps_smmu 0x25eb 0x04a0>;
++ <&apps_smmu 0x218b 0x0400>;
+ dma-coherent;
+ };
+ };
+@@ -5133,15 +5045,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x2941 0x04a0>,
+- <&apps_smmu 0x2961 0x04a0>,
+- <&apps_smmu 0x2981 0x0400>,
+- <&apps_smmu 0x29c1 0x04a0>,
+- <&apps_smmu 0x29e1 0x04a0>,
+- <&apps_smmu 0x2d41 0x04a0>,
+- <&apps_smmu 0x2d61 0x04a0>,
+- <&apps_smmu 0x2d81 0x0400>,
+- <&apps_smmu 0x2dc1 0x04a0>,
+- <&apps_smmu 0x2de1 0x04a0>;
++ <&apps_smmu 0x2981 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5149,15 +5053,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x2942 0x04a0>,
+- <&apps_smmu 0x2962 0x04a0>,
+- <&apps_smmu 0x2982 0x0400>,
+- <&apps_smmu 0x29c2 0x04a0>,
+- <&apps_smmu 0x29e2 0x04a0>,
+- <&apps_smmu 0x2d42 0x04a0>,
+- <&apps_smmu 0x2d62 0x04a0>,
+- <&apps_smmu 0x2d82 0x0400>,
+- <&apps_smmu 0x2dc2 0x04a0>,
+- <&apps_smmu 0x2de2 0x04a0>;
++ <&apps_smmu 0x2982 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5165,15 +5061,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x2943 0x04a0>,
+- <&apps_smmu 0x2963 0x04a0>,
+- <&apps_smmu 0x2983 0x0400>,
+- <&apps_smmu 0x29c3 0x04a0>,
+- <&apps_smmu 0x29e3 0x04a0>,
+- <&apps_smmu 0x2d43 0x04a0>,
+- <&apps_smmu 0x2d63 0x04a0>,
+- <&apps_smmu 0x2d83 0x0400>,
+- <&apps_smmu 0x2dc3 0x04a0>,
+- <&apps_smmu 0x2de3 0x04a0>;
++ <&apps_smmu 0x2983 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5181,15 +5069,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <4>;
+ iommus = <&apps_smmu 0x2944 0x04a0>,
+- <&apps_smmu 0x2964 0x04a0>,
+- <&apps_smmu 0x2984 0x0400>,
+- <&apps_smmu 0x29c4 0x04a0>,
+- <&apps_smmu 0x29e4 0x04a0>,
+- <&apps_smmu 0x2d44 0x04a0>,
+- <&apps_smmu 0x2d64 0x04a0>,
+- <&apps_smmu 0x2d84 0x0400>,
+- <&apps_smmu 0x2dc4 0x04a0>,
+- <&apps_smmu 0x2de4 0x04a0>;
++ <&apps_smmu 0x2984 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5197,15 +5077,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <5>;
+ iommus = <&apps_smmu 0x2945 0x04a0>,
+- <&apps_smmu 0x2965 0x04a0>,
+- <&apps_smmu 0x2985 0x0400>,
+- <&apps_smmu 0x29c5 0x04a0>,
+- <&apps_smmu 0x29e5 0x04a0>,
+- <&apps_smmu 0x2d45 0x04a0>,
+- <&apps_smmu 0x2d65 0x04a0>,
+- <&apps_smmu 0x2d85 0x0400>,
+- <&apps_smmu 0x2dc5 0x04a0>,
+- <&apps_smmu 0x2de5 0x04a0>;
++ <&apps_smmu 0x2985 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5213,15 +5085,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <6>;
+ iommus = <&apps_smmu 0x2946 0x04a0>,
+- <&apps_smmu 0x2966 0x04a0>,
+- <&apps_smmu 0x2986 0x0400>,
+- <&apps_smmu 0x29c6 0x04a0>,
+- <&apps_smmu 0x29e6 0x04a0>,
+- <&apps_smmu 0x2d46 0x04a0>,
+- <&apps_smmu 0x2d66 0x04a0>,
+- <&apps_smmu 0x2d86 0x0400>,
+- <&apps_smmu 0x2dc6 0x04a0>,
+- <&apps_smmu 0x2de6 0x04a0>;
++ <&apps_smmu 0x2986 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5229,15 +5093,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <7>;
+ iommus = <&apps_smmu 0x2947 0x04a0>,
+- <&apps_smmu 0x2967 0x04a0>,
+- <&apps_smmu 0x2987 0x0400>,
+- <&apps_smmu 0x29c7 0x04a0>,
+- <&apps_smmu 0x29e7 0x04a0>,
+- <&apps_smmu 0x2d47 0x04a0>,
+- <&apps_smmu 0x2d67 0x04a0>,
+- <&apps_smmu 0x2d87 0x0400>,
+- <&apps_smmu 0x2dc7 0x04a0>,
+- <&apps_smmu 0x2de7 0x04a0>;
++ <&apps_smmu 0x2987 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5245,15 +5101,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <8>;
+ iommus = <&apps_smmu 0x2948 0x04a0>,
+- <&apps_smmu 0x2968 0x04a0>,
+- <&apps_smmu 0x2988 0x0400>,
+- <&apps_smmu 0x29c8 0x04a0>,
+- <&apps_smmu 0x29e8 0x04a0>,
+- <&apps_smmu 0x2d48 0x04a0>,
+- <&apps_smmu 0x2d68 0x04a0>,
+- <&apps_smmu 0x2d88 0x0400>,
+- <&apps_smmu 0x2dc8 0x04a0>,
+- <&apps_smmu 0x2de8 0x04a0>;
++ <&apps_smmu 0x2988 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5261,15 +5109,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <9>;
+ iommus = <&apps_smmu 0x2949 0x04a0>,
+- <&apps_smmu 0x2969 0x04a0>,
+- <&apps_smmu 0x2989 0x0400>,
+- <&apps_smmu 0x29c9 0x04a0>,
+- <&apps_smmu 0x29e9 0x04a0>,
+- <&apps_smmu 0x2d49 0x04a0>,
+- <&apps_smmu 0x2d69 0x04a0>,
+- <&apps_smmu 0x2d89 0x0400>,
+- <&apps_smmu 0x2dc9 0x04a0>,
+- <&apps_smmu 0x2de9 0x04a0>;
++ <&apps_smmu 0x2989 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5277,15 +5117,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <10>;
+ iommus = <&apps_smmu 0x294a 0x04a0>,
+- <&apps_smmu 0x296a 0x04a0>,
+- <&apps_smmu 0x298a 0x0400>,
+- <&apps_smmu 0x29ca 0x04a0>,
+- <&apps_smmu 0x29ea 0x04a0>,
+- <&apps_smmu 0x2d4a 0x04a0>,
+- <&apps_smmu 0x2d6a 0x04a0>,
+- <&apps_smmu 0x2d8a 0x0400>,
+- <&apps_smmu 0x2dca 0x04a0>,
+- <&apps_smmu 0x2dea 0x04a0>;
++ <&apps_smmu 0x298a 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5293,15 +5125,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <11>;
+ iommus = <&apps_smmu 0x294b 0x04a0>,
+- <&apps_smmu 0x296b 0x04a0>,
+- <&apps_smmu 0x298b 0x0400>,
+- <&apps_smmu 0x29cb 0x04a0>,
+- <&apps_smmu 0x29eb 0x04a0>,
+- <&apps_smmu 0x2d4b 0x04a0>,
+- <&apps_smmu 0x2d6b 0x04a0>,
+- <&apps_smmu 0x2d8b 0x0400>,
+- <&apps_smmu 0x2dcb 0x04a0>,
+- <&apps_smmu 0x2deb 0x04a0>;
++ <&apps_smmu 0x298b 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5309,15 +5133,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <12>;
+ iommus = <&apps_smmu 0x294c 0x04a0>,
+- <&apps_smmu 0x296c 0x04a0>,
+- <&apps_smmu 0x298c 0x0400>,
+- <&apps_smmu 0x29cc 0x04a0>,
+- <&apps_smmu 0x29ec 0x04a0>,
+- <&apps_smmu 0x2d4c 0x04a0>,
+- <&apps_smmu 0x2d6c 0x04a0>,
+- <&apps_smmu 0x2d8c 0x0400>,
+- <&apps_smmu 0x2dcc 0x04a0>,
+- <&apps_smmu 0x2dec 0x04a0>;
++ <&apps_smmu 0x298c 0x0400>;
+ dma-coherent;
+ };
+
+@@ -5325,15 +5141,7 @@
+ compatible = "qcom,fastrpc-compute-cb";
+ reg = <13>;
+ iommus = <&apps_smmu 0x294d 0x04a0>,
+- <&apps_smmu 0x296d 0x04a0>,
+- <&apps_smmu 0x298d 0x0400>,
+- <&apps_smmu 0x29Cd 0x04a0>,
+- <&apps_smmu 0x29ed 0x04a0>,
+- <&apps_smmu 0x2d4d 0x04a0>,
+- <&apps_smmu 0x2d6d 0x04a0>,
+- <&apps_smmu 0x2d8d 0x0400>,
+- <&apps_smmu 0x2dcd 0x04a0>,
+- <&apps_smmu 0x2ded 0x04a0>;
++ <&apps_smmu 0x298d 0x0400>;
+ dma-coherent;
+ };
+ };
--- /dev/null
+From 295217420a44403a33c30f99d8337fe7b07eb02b Mon Sep 17 00:00:00 2001
+From: Alok Tiwari <alok.a.tiwari@oracle.com>
+Date: Wed, 14 May 2025 04:46:51 -0700
+Subject: arm64: dts: qcom: sm8350: Fix typo in pil_camera_mem node
+
+From: Alok Tiwari <alok.a.tiwari@oracle.com>
+
+commit 295217420a44403a33c30f99d8337fe7b07eb02b upstream.
+
+There is a typo in sm8350.dts where the node label
+mmeory@85200000 should be memory@85200000.
+This patch corrects the typo for clarity and consistency.
+
+Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
+Cc: stable@vger.kernel.org
+Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
+Link: https://lore.kernel.org/r/20250514114656.2307828-1-alok.a.tiwari@oracle.com
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
++++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
+@@ -455,7 +455,7 @@
+ no-map;
+ };
+
+- pil_camera_mem: mmeory@85200000 {
++ pil_camera_mem: memory@85200000 {
+ reg = <0x0 0x85200000 0x0 0x500000>;
+ no-map;
+ };
--- /dev/null
+From 0fe6357229cb15a64b6413c62f1c3d4de68ce55f Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 12 Feb 2025 18:03:48 +0100
+Subject: arm64: dts: qcom: sm8450: Add missing properties for cryptobam
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 0fe6357229cb15a64b6413c62f1c3d4de68ce55f upstream.
+
+num-channels and qcom,num-ees are required for BAM nodes without clock,
+because the driver cannot ensure the hardware is powered on when trying to
+obtain the information from the hardware registers. Specifying the node
+without these properties is unsafe and has caused early boot crashes for
+other SoCs before [1, 2].
+
+Add the missing information from the hardware registers to ensure the
+driver can probe successfully without causing crashes.
+
+[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/
+[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/
+
+Cc: stable@vger.kernel.org
+Fixes: b92b0d2f7582 ("arm64: dts: qcom: sm8450: add crypto nodes")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-2-f560889e65d8@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
++++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
+@@ -5283,6 +5283,8 @@
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
++ qcom,num-ees = <4>;
++ num-channels = <16>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x584 0x11>,
+ <&apps_smmu 0x588 0x0>,
--- /dev/null
+From 663cd2cad36da23cf1a3db7868fce9f1a19b2d61 Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 12 Feb 2025 18:03:49 +0100
+Subject: arm64: dts: qcom: sm8550: Add missing properties for cryptobam
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 663cd2cad36da23cf1a3db7868fce9f1a19b2d61 upstream.
+
+num-channels and qcom,num-ees are required for BAM nodes without clock,
+because the driver cannot ensure the hardware is powered on when trying to
+obtain the information from the hardware registers. Specifying the node
+without these properties is unsafe and has caused early boot crashes for
+other SoCs before [1, 2].
+
+Add the missing information from the hardware registers to ensure the
+driver can probe successfully without causing crashes.
+
+[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/
+[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/
+
+Cc: stable@vger.kernel.org
+Fixes: 433477c3bf0b ("arm64: dts: qcom: sm8550: add QCrypto nodes")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-3-f560889e65d8@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
++++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
+@@ -1957,6 +1957,8 @@
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
++ qcom,num-ees = <4>;
++ num-channels = <20>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x480 0x0>,
+ <&apps_smmu 0x481 0x0>;
--- /dev/null
+From 38b88722bce07b6a5927f45fbf7a9a85e834572c Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 12 Feb 2025 18:03:50 +0100
+Subject: arm64: dts: qcom: sm8650: Add missing properties for cryptobam
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 38b88722bce07b6a5927f45fbf7a9a85e834572c upstream.
+
+num-channels and qcom,num-ees are required for BAM nodes without clock,
+because the driver cannot ensure the hardware is powered on when trying to
+obtain the information from the hardware registers. Specifying the node
+without these properties is unsafe and has caused early boot crashes for
+other SoCs before [1, 2].
+
+Add the missing information from the hardware registers to ensure the
+driver can probe successfully without causing crashes.
+
+[1]: https://lore.kernel.org/r/CY01EKQVWE36.B9X5TDXAREPF@fairphone.com/
+[2]: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org/
+
+Cc: stable@vger.kernel.org
+Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Link: https://lore.kernel.org/r/20250212-bam-dma-fixes-v1-4-f560889e65d8@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
++++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
+@@ -2533,6 +2533,8 @@
+ <&apps_smmu 0x481 0>;
+
+ qcom,ee = <0>;
++ qcom,num-ees = <4>;
++ num-channels = <20>;
+ qcom,controlled-remotely;
+ };
+
--- /dev/null
+From 3ed2a9e03abfeece9e30ebc746f935536f661414 Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 23 Apr 2025 09:30:08 +0200
+Subject: arm64: dts: qcom: x1e001de-devkit: Fix vreg_l2j_1p2 voltage
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 3ed2a9e03abfeece9e30ebc746f935536f661414 upstream.
+
+In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
+uV instead of the 1200000 uV we have currently in the device tree. Use the
+same for consistency and correctness.
+
+Cc: stable@vger.kernel.org
+Fixes: 7b8a31e82b87 ("arm64: dts: qcom: Add X1E001DE Snapdragon Devkit for Windows")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-2-24b6a2043025@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
++++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
+@@ -745,8 +745,8 @@
+
+ vreg_l2j_1p2: ldo2 {
+ regulator-name = "vreg_l2j_1p2";
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
++ regulator-min-microvolt = <1256000>;
++ regulator-max-microvolt = <1256000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
--- /dev/null
+From 7d328cc134f7db1e062f616a30cffe96fbc43abb Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Fri, 14 Mar 2025 15:54:35 +0100
+Subject: arm64: dts: qcom: x1e001de-devkit: mark l12b and l15b always-on
+
+From: Johan Hovold <johan+linaro@kernel.org>
+
+commit 7d328cc134f7db1e062f616a30cffe96fbc43abb upstream.
+
+The l12b and l15b supplies are used by components that are not (fully)
+described (and some never will be) and must never be disabled.
+
+Mark the regulators as always-on to prevent them from being disabled,
+for example, when consumers probe defer or suspend.
+
+Fixes: 7b8a31e82b87 ("arm64: dts: qcom: Add X1E001DE Snapdragon Devkit for Windows")
+Cc: stable@vger.kernel.org # 6.14
+Cc: Sibi Sankar <quic_sibis@quicinc.com>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Link: https://lore.kernel.org/r/20250314145440.11371-4-johan+linaro@kernel.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
+index f87730f4b63f..b133302bf846 100644
+--- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
++++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
+@@ -507,6 +507,7 @@ vreg_l12b_1p2: ldo12 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l13b_3p0: ldo13 {
+@@ -528,6 +529,7 @@ vreg_l15b_1p8: ldo15 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l16b_2p9: ldo16 {
+--
+2.49.0
+
--- /dev/null
+From 5ba21fa11f473c9827f378ace8c9f983de9e0287 Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 19 Feb 2025 12:36:20 +0100
+Subject: arm64: dts: qcom: x1e80100: Add GPU cooling
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 5ba21fa11f473c9827f378ace8c9f983de9e0287 upstream.
+
+Unlike the CPU, the GPU does not throttle its speed automatically when it
+reaches high temperatures. With certain high GPU loads it is possible to
+reach the critical hardware shutdown temperature of 120°C, endangering the
+hardware and making it impossible to run certain applications.
+
+Set up GPU cooling similar to the ACPI tables, by throttling the GPU speed
+when reaching 95°C and polling every 200ms.
+
+Cc: stable@vger.kernel.org
+Fixes: 721e38301b79 ("arm64: dts: qcom: x1e80100: Add gpu support")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250219-x1e80100-thermal-fixes-v1-3-d110e44ac3f9@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 169 +++++++++++++++++----------------
+ 1 file changed, 89 insertions(+), 80 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
++++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+@@ -20,6 +20,7 @@
+ #include <dt-bindings/soc/qcom,gpr.h>
+ #include <dt-bindings/soc/qcom,rpmh-rsc.h>
+ #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
++#include <dt-bindings/thermal/thermal.h>
+
+ / {
+ interrupt-parent = <&intc>;
+@@ -9359,24 +9360,25 @@
+ };
+
+ gpuss-0-thermal {
+- polling-delay-passive = <10>;
++ polling-delay-passive = <200>;
+
+ thermal-sensors = <&tsens3 5>;
+
+- trips {
+- trip-point0 {
+- temperature = <85000>;
+- hysteresis = <1000>;
+- type = "passive";
++ cooling-maps {
++ map0 {
++ trip = <&gpuss0_alert0>;
++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
++ };
+
+- trip-point1 {
+- temperature = <90000>;
++ trips {
++ gpuss0_alert0: trip-point0 {
++ temperature = <95000>;
+ hysteresis = <1000>;
+- type = "hot";
++ type = "passive";
+ };
+
+- trip-point2 {
++ gpu-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+@@ -9385,24 +9387,25 @@
+ };
+
+ gpuss-1-thermal {
+- polling-delay-passive = <10>;
++ polling-delay-passive = <200>;
+
+ thermal-sensors = <&tsens3 6>;
+
+- trips {
+- trip-point0 {
+- temperature = <85000>;
+- hysteresis = <1000>;
+- type = "passive";
++ cooling-maps {
++ map0 {
++ trip = <&gpuss1_alert0>;
++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
++ };
+
+- trip-point1 {
+- temperature = <90000>;
++ trips {
++ gpuss1_alert0: trip-point0 {
++ temperature = <95000>;
+ hysteresis = <1000>;
+- type = "hot";
++ type = "passive";
+ };
+
+- trip-point2 {
++ gpu-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+@@ -9411,24 +9414,25 @@
+ };
+
+ gpuss-2-thermal {
+- polling-delay-passive = <10>;
++ polling-delay-passive = <200>;
+
+ thermal-sensors = <&tsens3 7>;
+
+- trips {
+- trip-point0 {
+- temperature = <85000>;
+- hysteresis = <1000>;
+- type = "passive";
++ cooling-maps {
++ map0 {
++ trip = <&gpuss2_alert0>;
++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
++ };
+
+- trip-point1 {
+- temperature = <90000>;
++ trips {
++ gpuss2_alert0: trip-point0 {
++ temperature = <95000>;
+ hysteresis = <1000>;
+- type = "hot";
++ type = "passive";
+ };
+
+- trip-point2 {
++ gpu-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+@@ -9437,24 +9441,25 @@
+ };
+
+ gpuss-3-thermal {
+- polling-delay-passive = <10>;
++ polling-delay-passive = <200>;
+
+ thermal-sensors = <&tsens3 8>;
+
+- trips {
+- trip-point0 {
+- temperature = <85000>;
+- hysteresis = <1000>;
+- type = "passive";
++ cooling-maps {
++ map0 {
++ trip = <&gpuss3_alert0>;
++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
++ };
+
+- trip-point1 {
+- temperature = <90000>;
++ trips {
++ gpuss3_alert0: trip-point0 {
++ temperature = <95000>;
+ hysteresis = <1000>;
+- type = "hot";
++ type = "passive";
+ };
+
+- trip-point2 {
++ gpu-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+@@ -9463,24 +9468,25 @@
+ };
+
+ gpuss-4-thermal {
+- polling-delay-passive = <10>;
++ polling-delay-passive = <200>;
+
+ thermal-sensors = <&tsens3 9>;
+
+- trips {
+- trip-point0 {
+- temperature = <85000>;
+- hysteresis = <1000>;
+- type = "passive";
++ cooling-maps {
++ map0 {
++ trip = <&gpuss4_alert0>;
++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
++ };
+
+- trip-point1 {
+- temperature = <90000>;
++ trips {
++ gpuss4_alert0: trip-point0 {
++ temperature = <95000>;
+ hysteresis = <1000>;
+- type = "hot";
++ type = "passive";
+ };
+
+- trip-point2 {
++ gpu-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+@@ -9489,24 +9495,25 @@
+ };
+
+ gpuss-5-thermal {
+- polling-delay-passive = <10>;
++ polling-delay-passive = <200>;
+
+ thermal-sensors = <&tsens3 10>;
+
+- trips {
+- trip-point0 {
+- temperature = <85000>;
+- hysteresis = <1000>;
+- type = "passive";
++ cooling-maps {
++ map0 {
++ trip = <&gpuss5_alert0>;
++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
++ };
+
+- trip-point1 {
+- temperature = <90000>;
++ trips {
++ gpuss5_alert0: trip-point0 {
++ temperature = <95000>;
+ hysteresis = <1000>;
+- type = "hot";
++ type = "passive";
+ };
+
+- trip-point2 {
++ gpu-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+@@ -9515,24 +9522,25 @@
+ };
+
+ gpuss-6-thermal {
+- polling-delay-passive = <10>;
++ polling-delay-passive = <200>;
+
+ thermal-sensors = <&tsens3 11>;
+
+- trips {
+- trip-point0 {
+- temperature = <85000>;
+- hysteresis = <1000>;
+- type = "passive";
++ cooling-maps {
++ map0 {
++ trip = <&gpuss6_alert0>;
++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
++ };
+
+- trip-point1 {
+- temperature = <90000>;
++ trips {
++ gpuss6_alert0: trip-point0 {
++ temperature = <95000>;
+ hysteresis = <1000>;
+- type = "hot";
++ type = "passive";
+ };
+
+- trip-point2 {
++ gpu-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+@@ -9541,24 +9549,25 @@
+ };
+
+ gpuss-7-thermal {
+- polling-delay-passive = <10>;
++ polling-delay-passive = <200>;
+
+ thermal-sensors = <&tsens3 12>;
+
+- trips {
+- trip-point0 {
+- temperature = <85000>;
+- hysteresis = <1000>;
+- type = "passive";
++ cooling-maps {
++ map0 {
++ trip = <&gpuss7_alert0>;
++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
++ };
+
+- trip-point1 {
+- temperature = <90000>;
++ trips {
++ gpuss7_alert0: trip-point0 {
++ temperature = <95000>;
+ hysteresis = <1000>;
+- type = "hot";
++ type = "passive";
+ };
+
+- trip-point2 {
++ gpu-critical {
+ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
--- /dev/null
+From 03f2b8eed73418269a158ccebad5d8d8f2f6daa1 Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 19 Feb 2025 12:36:19 +0100
+Subject: arm64: dts: qcom: x1e80100: Apply consistent critical thermal shutdown
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 03f2b8eed73418269a158ccebad5d8d8f2f6daa1 upstream.
+
+The firmware configures the TSENS controller with a maximum temperature of
+120°C. When reaching that temperature, the hardware automatically triggers
+a reset of the entire platform. Some of the thermal zones in x1e80100.dtsi
+use a critical trip point of 125°C. It's impossible to reach those.
+
+It's preferable to shut down the system cleanly before reaching the
+hardware trip point. Make the critical temperature trip points consistent
+by setting all of them to 115°C and apply a consistent hysteresis.
+The ACPI tables also specify 115°C as critical shutdown temperature.
+
+Cc: stable@vger.kernel.org
+Fixes: 4e915987ff5b ("arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250219-x1e80100-thermal-fixes-v1-2-d110e44ac3f9@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 128 ++++++++++++++++-----------------
+ 1 file changed, 64 insertions(+), 64 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
++++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+@@ -8457,8 +8457,8 @@
+ };
+
+ aoss0-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -8483,7 +8483,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8509,7 +8509,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8535,7 +8535,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8561,7 +8561,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8587,7 +8587,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8613,7 +8613,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8639,7 +8639,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8665,7 +8665,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8683,8 +8683,8 @@
+ };
+
+ cpuss2-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -8701,8 +8701,8 @@
+ };
+
+ cpuss2-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -8719,7 +8719,7 @@
+ };
+
+ mem-critical {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+@@ -8737,7 +8737,7 @@
+ };
+
+ video-critical {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8755,8 +8755,8 @@
+ };
+
+ aoss0-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -8781,7 +8781,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8807,7 +8807,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8833,7 +8833,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8859,7 +8859,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8885,7 +8885,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8911,7 +8911,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8937,7 +8937,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8963,7 +8963,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -8981,8 +8981,8 @@
+ };
+
+ cpuss2-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -8999,8 +8999,8 @@
+ };
+
+ cpuss2-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9017,8 +9017,8 @@
+ };
+
+ aoss0-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9043,7 +9043,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9069,7 +9069,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9095,7 +9095,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9121,7 +9121,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9147,7 +9147,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9173,7 +9173,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9199,7 +9199,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9225,7 +9225,7 @@
+ };
+
+ cpu-critical {
+- temperature = <110000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9243,8 +9243,8 @@
+ };
+
+ cpuss2-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9261,8 +9261,8 @@
+ };
+
+ cpuss2-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9279,8 +9279,8 @@
+ };
+
+ aoss0-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9297,8 +9297,8 @@
+ };
+
+ nsp0-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9315,8 +9315,8 @@
+ };
+
+ nsp1-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9333,8 +9333,8 @@
+ };
+
+ nsp2-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9351,8 +9351,8 @@
+ };
+
+ nsp3-critical {
+- temperature = <125000>;
+- hysteresis = <0>;
++ temperature = <115000>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9377,7 +9377,7 @@
+ };
+
+ trip-point2 {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9403,7 +9403,7 @@
+ };
+
+ trip-point2 {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9429,7 +9429,7 @@
+ };
+
+ trip-point2 {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9455,7 +9455,7 @@
+ };
+
+ trip-point2 {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9481,7 +9481,7 @@
+ };
+
+ trip-point2 {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9507,7 +9507,7 @@
+ };
+
+ trip-point2 {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9533,7 +9533,7 @@
+ };
+
+ trip-point2 {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9559,7 +9559,7 @@
+ };
+
+ trip-point2 {
+- temperature = <125000>;
++ temperature = <115000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+@@ -9578,7 +9578,7 @@
+
+ camera0-critical {
+ temperature = <115000>;
+- hysteresis = <0>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+@@ -9596,7 +9596,7 @@
+
+ camera0-critical {
+ temperature = <115000>;
+- hysteresis = <0>;
++ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
--- /dev/null
+From 0fb9ecf8713a7a458f7378c86e0703467db2ad22 Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 23 Apr 2025 09:30:09 +0200
+Subject: arm64: dts: qcom: x1e80100-asus-vivobook-s15: Fix vreg_l2j_1p2 voltage
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 0fb9ecf8713a7a458f7378c86e0703467db2ad22 upstream.
+
+In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
+uV instead of the 1200000 uV we have currently in the device tree. Use the
+same for consistency and correctness.
+
+Cc: stable@vger.kernel.org
+Fixes: d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-3-24b6a2043025@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
+@@ -330,8 +330,8 @@
+
+ vreg_l2j_1p2: ldo2 {
+ regulator-name = "vreg_l2j_1p2";
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
++ regulator-min-microvolt = <1256000>;
++ regulator-max-microvolt = <1256000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
--- /dev/null
+From 63169c07d74031c5e10a9f91229dabade880cf0f Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Fri, 14 Mar 2025 15:54:36 +0100
+Subject: arm64: dts: qcom: x1e80100-dell-xps13-9345: mark l12b and l15b always-on
+
+From: Johan Hovold <johan+linaro@kernel.org>
+
+commit 63169c07d74031c5e10a9f91229dabade880cf0f upstream.
+
+The l12b and l15b supplies are used by components that are not (fully)
+described (and some never will be) and must never be disabled.
+
+Mark the regulators as always-on to prevent them from being disabled,
+for example, when consumers probe defer or suspend.
+
+Note that these supplies currently have no consumers described in
+mainline.
+
+Fixes: f5b788d0e8cd ("arm64: dts: qcom: Add support for X1-based Dell XPS 13 9345")
+Cc: stable@vger.kernel.org # 6.13
+Reviewed-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
+Tested-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Link: https://lore.kernel.org/r/20250314145440.11371-5-johan+linaro@kernel.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
+@@ -359,6 +359,7 @@
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l13b_3p0: ldo13 {
+@@ -380,6 +381,7 @@
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l17b_2p5: ldo17 {
--- /dev/null
+From 181faec4cc9d90dad0ec7f7c8124269c0ba2e107 Mon Sep 17 00:00:00 2001
+From: Abel Vesa <abel.vesa@linaro.org>
+Date: Tue, 22 Apr 2025 14:03:16 +0300
+Subject: arm64: dts: qcom: x1e80100: Fix PCIe 3rd controller DBI size
+
+From: Abel Vesa <abel.vesa@linaro.org>
+
+commit 181faec4cc9d90dad0ec7f7c8124269c0ba2e107 upstream.
+
+According to documentation, the DBI range size is 0xf20. So fix it.
+
+Cc: stable@vger.kernel.org # 6.14
+Fixes: f8af195beeb0 ("arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100")
+Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250422-x1e80100-dts-fix-pcie3-dbi-size-v1-1-c197701fd7e4@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+index c04a2615ca77..06175b33bd92 100644
+--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
++++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+@@ -3126,7 +3126,7 @@ pcie3: pcie@1bd0000 {
+ device_type = "pci";
+ compatible = "qcom,pcie-x1e80100";
+ reg = <0x0 0x01bd0000 0x0 0x3000>,
+- <0x0 0x78000000 0x0 0xf1d>,
++ <0x0 0x78000000 0x0 0xf20>,
+ <0x0 0x78000f40 0x0 0xa8>,
+ <0x0 0x78001000 0x0 0x1000>,
+ <0x0 0x78100000 0x0 0x100000>,
+--
+2.49.0
+
--- /dev/null
+From 801befff4c827aa72e3698367c5afc18987a6a3f Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 19 Feb 2025 12:36:18 +0100
+Subject: arm64: dts: qcom: x1e80100: Fix video thermal zone
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 801befff4c827aa72e3698367c5afc18987a6a3f upstream.
+
+A passive trip point at 125°C is pretty high, this is usually the
+temperature for the critical shutdown trip point. Also, we don't have any
+passive cooling devices attached to the video thermal zone.
+
+Change this to be a critical trip point, and add a "hot" trip point at
+90°C for consistency with the other thermal zones.
+
+Cc: stable@vger.kernel.org
+Fixes: 4e915987ff5b ("arm64: dts: qcom: x1e80100: Enable tsens and thermal zone nodes")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250219-x1e80100-thermal-fixes-v1-1-d110e44ac3f9@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100.dtsi | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
++++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+@@ -8727,15 +8727,19 @@
+ };
+
+ video-thermal {
+- polling-delay-passive = <250>;
+-
+ thermal-sensors = <&tsens0 12>;
+
+ trips {
+ trip-point0 {
++ temperature = <90000>;
++ hysteresis = <2000>;
++ type = "hot";
++ };
++
++ video-critical {
+ temperature = <125000>;
+ hysteresis = <1000>;
+- type = "passive";
++ type = "critical";
+ };
+ };
+ };
--- /dev/null
+From 48274b40a3719a950b1062f8125c972a2df5c083 Mon Sep 17 00:00:00 2001
+From: Juerg Haefliger <juerg.haefliger@canonical.com>
+Date: Wed, 19 Mar 2025 17:05:09 +0100
+Subject: arm64: dts: qcom: x1e80100-hp-omnibook-x14: Enable SMB2360 0 and 1
+
+From: Juerg Haefliger <juerg.haefliger@canonical.com>
+
+commit 48274b40a3719a950b1062f8125c972a2df5c083 upstream.
+
+Commit d37e2646c8a5 ("arm64: dts: qcom: x1e80100-pmics: Enable all SMB2360
+separately") disables all SMB2360s and let the board DTS explicitly enable
+them. The HP OmniBook DTS is from before this change and is missing the
+explicit enabling. Add that to get all USB root ports.
+
+Fixes: 6f18b8d4142c ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14")
+Cc: stable@vger.kernel.org # 6.14
+Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
+Link: https://lore.kernel.org/r/20250319160509.1812805-1-juerg.haefliger@canonical.com
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
+@@ -1352,18 +1352,22 @@
+ status = "okay";
+ };
+
++&smb2360_0 {
++ status = "okay";
++};
++
+ &smb2360_0_eusb2_repeater {
+ vdd18-supply = <&vreg_l3d_1p8>;
+ vdd3-supply = <&vreg_l2b_3p0>;
++};
+
++&smb2360_1 {
+ status = "okay";
+ };
+
+ &smb2360_1_eusb2_repeater {
+ vdd18-supply = <&vreg_l3d_1p8>;
+ vdd3-supply = <&vreg_l14b_3p0>;
+-
+- status = "okay";
+ };
+
+ &swr0 {
--- /dev/null
+From 4a09dad9d437a13e9cd4383ff7791a816a6e1652 Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 23 Apr 2025 09:30:10 +0200
+Subject: arm64: dts: qcom: x1e80100-hp-omnibook-x14: Fix vreg_l2j_1p2 voltage
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 4a09dad9d437a13e9cd4383ff7791a816a6e1652 upstream.
+
+In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
+uV instead of the 1200000 uV we have currently in the device tree. Use the
+same for consistency and correctness.
+
+Cc: stable@vger.kernel.org
+Fixes: 6f18b8d4142c ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-4-24b6a2043025@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
+@@ -871,8 +871,8 @@
+
+ vreg_l2j_1p2: ldo2 {
+ regulator-name = "vreg_l2j_1p2";
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
++ regulator-min-microvolt = <1256000>;
++ regulator-max-microvolt = <1256000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
--- /dev/null
+From 3ab4e212a41c46668adf93c8d10d0d3d6de8f0e4 Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Fri, 14 Mar 2025 15:54:37 +0100
+Subject: arm64: dts: qcom: x1e80100-hp-x14: mark l12b and l15b always-on
+
+From: Johan Hovold <johan+linaro@kernel.org>
+
+commit 3ab4e212a41c46668adf93c8d10d0d3d6de8f0e4 upstream.
+
+The l12b and l15b supplies are used by components that are not (fully)
+described (and some never will be) and must never be disabled.
+
+Mark the regulators as always-on to prevent them from being disabled,
+for example, when consumers probe defer or suspend.
+
+Fixes: 6f18b8d4142c ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14")
+Cc: stable@vger.kernel.org # 6.14
+Cc: Jens Glathe <jens.glathe@oldschoolsolutions.biz>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Link: https://lore.kernel.org/r/20250314145440.11371-6-johan+linaro@kernel.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts
+@@ -633,6 +633,7 @@
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l13b_3p0: ldo13 {
+@@ -654,6 +655,7 @@
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l16b_2p9: ldo16 {
--- /dev/null
+From 4f27ede34ca3369cdcde80c5a4ca84cdb28edbbb Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 23 Apr 2025 09:30:11 +0200
+Subject: arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Fix vreg_l2j_1p2 voltage
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit 4f27ede34ca3369cdcde80c5a4ca84cdb28edbbb upstream.
+
+In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
+uV instead of the 1200000 uV we have currently in the device tree. Use the
+same for consistency and correctness.
+
+Cc: stable@vger.kernel.org
+Fixes: 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-5-24b6a2043025@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
+@@ -508,8 +508,8 @@
+
+ vreg_l2j_1p2: ldo2 {
+ regulator-name = "vreg_l2j_1p2";
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
++ regulator-min-microvolt = <1256000>;
++ regulator-max-microvolt = <1256000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
--- /dev/null
+From efdbeae860bf0278b050c6c9ad5921afba4596d0 Mon Sep 17 00:00:00 2001
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+Date: Wed, 23 Apr 2025 09:30:12 +0200
+Subject: arm64: dts: qcom: x1e80100-qcp: Fix vreg_l2j_1p2 voltage
+
+From: Stephan Gerhold <stephan.gerhold@linaro.org>
+
+commit efdbeae860bf0278b050c6c9ad5921afba4596d0 upstream.
+
+In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
+uV instead of the 1200000 uV we have currently in the device tree. Use the
+same for consistency and correctness.
+
+Cc: stable@vger.kernel.org
+Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts")
+Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
+Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
+Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-6-24b6a2043025@linaro.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+@@ -675,8 +675,8 @@
+
+ vreg_l2j_1p2: ldo2 {
+ regulator-name = "vreg_l2j_1p2";
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
++ regulator-min-microvolt = <1256000>;
++ regulator-max-microvolt = <1256000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
--- /dev/null
+From ff6ba96378367133b66587bd3ee9f068a39ff3a9 Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Fri, 14 Mar 2025 15:54:39 +0100
+Subject: arm64: dts: qcom: x1e80100-qcp: mark l12b and l15b always-on
+
+From: Johan Hovold <johan+linaro@kernel.org>
+
+commit ff6ba96378367133b66587bd3ee9f068a39ff3a9 upstream.
+
+The l12b and l15b supplies are used by components that are not (fully)
+described (and some never will be) and must never be disabled.
+
+Mark the regulators as always-on to prevent them from being disabled,
+for example, when consumers probe defer or suspend.
+
+Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts")
+Cc: stable@vger.kernel.org # 6.8
+Cc: Rajendra Nayak <quic_rjendra@quicinc.com>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Link: https://lore.kernel.org/r/20250314145440.11371-8-johan+linaro@kernel.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+@@ -437,6 +437,7 @@
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l13b_3p0: ldo13 {
+@@ -458,6 +459,7 @@
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l16b_2p9: ldo16 {
--- /dev/null
+From f43a71dc6d8d8378af587675eec77c06e0298c79 Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Fri, 14 Mar 2025 15:54:38 +0100
+Subject: arm64: dts: qcom: x1e80100-yoga-slim7x: mark l12b and l15b always-on
+
+From: Johan Hovold <johan+linaro@kernel.org>
+
+commit f43a71dc6d8d8378af587675eec77c06e0298c79 upstream.
+
+The l12b and l15b supplies are used by components that are not (fully)
+described (and some never will be) and must never be disabled.
+
+Mark the regulators as always-on to prevent them from being disabled,
+for example, when consumers probe defer or suspend.
+
+Fixes: 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree")
+Cc: stable@vger.kernel.org # 6.11
+Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
+Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Link: https://lore.kernel.org/r/20250314145440.11371-7-johan+linaro@kernel.org
+Signed-off-by: Bjorn Andersson <andersson@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
++++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
+@@ -290,6 +290,7 @@
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+
+ vreg_l14b_3p0: ldo14 {
+@@ -304,8 +305,8 @@
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
++ regulator-always-on;
+ };
+-
+ };
+
+ regulators-1 {
--- /dev/null
+From d7cc532df95f7f159e40595440e4e4b99481457b Mon Sep 17 00:00:00 2001
+From: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
+Date: Fri, 25 Apr 2025 17:18:08 +0200
+Subject: arm64: dts: rockchip: fix internal USB hub instability on RK3399 Puma
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
+
+commit d7cc532df95f7f159e40595440e4e4b99481457b upstream.
+
+Currently, the onboard Cypress CYUSB3304 USB hub is not defined in
+the device tree, and hub reset pin is provided as vcc5v0_host
+regulator to usb phy. This causes instability issues, as a result
+of improper reset duration.
+
+The fixed regulator device requests the GPIO during probe in its
+inactive state (except if regulator-boot-on property is set, in
+which case it is requested in the active state). Considering gpio
+is GPIO_ACTIVE_LOW for Puma, it means it’s driving it high. Then
+the regulator gets enabled (because regulator-always-on property),
+which drives it to its active state, meaning driving it low.
+
+The Cypress CYUSB3304 USB hub actually requires the reset to be
+asserted for at least 5 ms, which we cannot guarantee right now
+since there's no delay in the current config, meaning the hub may
+sometimes work or not. We could add delay as offered by
+fixed-regulator but let's rather fix this by using the proper way
+to model onboard USB hubs.
+
+Define hub_2_0 and hub_3_0 nodes, as the onboard Cypress hub
+consist of two 'logical' hubs, for USB2.0 and USB3.0.
+Use the 'reset-gpios' property of hub to assign reset pin instead
+of using regulator. Rename the vcc5v0_host regulator to
+cy3304_reset to be more meaningful. Pin is configured to
+output-high by default, which sets the hub in reset state
+during pin controller initialization. This allows to avoid double
+enumeration of devices in case the bootloader has setup the USB
+hub before the kernel.
+The vdd-supply and vdd2-supply properties in hub nodes are
+added to provide correct dt-bindings, although power supplies are
+always enabled based on HW design.
+
+Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
+Cc: stable@vger.kernel.org # 6.6
+Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver
+Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
+Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-3-4a76a474a010@thaumatec.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 40 ++++++++++++++++----------
+ 1 file changed, 26 insertions(+), 14 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
++++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
+@@ -60,16 +60,6 @@
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+- vcc5v0_host: regulator-vcc5v0-host {
+- compatible = "regulator-fixed";
+- gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&vcc5v0_host_en>;
+- regulator-name = "vcc5v0_host";
+- regulator-always-on;
+- vin-supply = <&vcc5v0_sys>;
+- };
+-
+ vcc5v0_sys: regulator-vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+@@ -521,10 +511,10 @@
+ };
+ };
+
+- usb2 {
+- vcc5v0_host_en: vcc5v0-host-en {
++ usb {
++ cy3304_reset: cy3304-reset {
+ rockchip,pins =
+- <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
++ <4 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+ };
+
+@@ -591,7 +581,6 @@
+ };
+
+ u2phy1_host: host-port {
+- phy-supply = <&vcc5v0_host>;
+ status = "okay";
+ };
+ };
+@@ -603,6 +592,29 @@
+ &usbdrd_dwc3_1 {
+ status = "okay";
+ dr_mode = "host";
++ pinctrl-names = "default";
++ pinctrl-0 = <&cy3304_reset>;
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ hub_2_0: hub@1 {
++ compatible = "usb4b4,6502", "usb4b4,6506";
++ reg = <1>;
++ peer-hub = <&hub_3_0>;
++ reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
++ vdd-supply = <&vcc1v2_phy>;
++ vdd2-supply = <&vcc3v3_sys>;
++
++ };
++
++ hub_3_0: hub@2 {
++ compatible = "usb4b4,6500", "usb4b4,6504";
++ reg = <2>;
++ peer-hub = <&hub_2_0>;
++ reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
++ vdd-supply = <&vcc1v2_phy>;
++ vdd2-supply = <&vcc3v3_sys>;
++ };
+ };
+
+ &usb_host1_ehci {
--- /dev/null
+From a6c9896e65e555d679a4bc71c3cdfce6df4b2343 Mon Sep 17 00:00:00 2001
+From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
+Date: Thu, 13 Feb 2025 18:50:36 +0800
+Subject: arm64: dts: socfpga: agilex5: fix gpio0 address
+
+From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
+
+commit a6c9896e65e555d679a4bc71c3cdfce6df4b2343 upstream.
+
+Use the correct gpio0 address for Agilex5.
+
+Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id")
+Cc: stable@vger.kernel.org
+Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
+Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+index 51c6e19e40b8..7d9394a04302 100644
+--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
++++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+@@ -222,9 +222,9 @@ i3c1: i3c@10da1000 {
+ status = "disabled";
+ };
+
+- gpio0: gpio@ffc03200 {
++ gpio0: gpio@10c03200 {
+ compatible = "snps,dw-apb-gpio";
+- reg = <0xffc03200 0x100>;
++ reg = <0x10c03200 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ resets = <&rst GPIO0_RESET>;
+--
+2.49.0
+
--- /dev/null
+From 3a71cdfec94436079513d9adf4b1d4f7a7edd917 Mon Sep 17 00:00:00 2001
+From: Judith Mendez <jm@ti.com>
+Date: Tue, 29 Apr 2025 11:33:35 -0500
+Subject: arm64: dts: ti: k3-am62-main: Set eMMC clock parent to default
+
+From: Judith Mendez <jm@ti.com>
+
+commit 3a71cdfec94436079513d9adf4b1d4f7a7edd917 upstream.
+
+Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT
+for eMMC. This change is necessary since DM is not implementing the
+correct procedure to switch PLL clock source for eMMC and MMC CLK mux is
+not glich-free. As a preventative action, lets switch back to the defaults.
+
+Fixes: c37c58fdeb8a ("arm64: dts: ti: k3-am62: Add more peripheral nodes")
+Cc: stable@vger.kernel.org
+Signed-off-by: Judith Mendez <jm@ti.com>
+Acked-by: Udit Kumar <u-kumar1@ti.com>
+Acked-by: Bryan Brattlof <bb@ti.com>
+Link: https://lore.kernel.org/r/20250429163337.15634-2-jm@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
++++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+@@ -552,8 +552,6 @@
+ power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
+ clock-names = "clk_ahb", "clk_xin";
+- assigned-clocks = <&k3_clks 57 6>;
+- assigned-clock-parents = <&k3_clks 57 8>;
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
--- /dev/null
+From 6af731c5de59cc4e7cce193d446f1fe872ac711b Mon Sep 17 00:00:00 2001
+From: Judith Mendez <jm@ti.com>
+Date: Tue, 29 Apr 2025 11:33:36 -0500
+Subject: arm64: dts: ti: k3-am62a-main: Set eMMC clock parent to default
+
+From: Judith Mendez <jm@ti.com>
+
+commit 6af731c5de59cc4e7cce193d446f1fe872ac711b upstream.
+
+Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT
+for eMMC. This change is necessary since DM is not implementing the
+correct procedure to switch PLL clock source for eMMC and MMC CLK mux is
+not glich-free. As a preventative action, lets switch back to the defaults.
+
+Fixes: d3ae4e8d8b6a ("arm64: dts: ti: k3-am62a-main: Add sdhci0 instance")
+Cc: stable@vger.kernel.org
+Signed-off-by: Judith Mendez <jm@ti.com>
+Acked-by: Udit Kumar <u-kumar1@ti.com>
+Acked-by: Bryan Brattlof <bb@ti.com>
+Link: https://lore.kernel.org/r/20250429163337.15634-3-jm@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
++++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+@@ -575,8 +575,6 @@
+ power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
+ clock-names = "clk_ahb", "clk_xin";
+- assigned-clocks = <&k3_clks 57 6>;
+- assigned-clock-parents = <&k3_clks 57 8>;
+ bus-width = <8>;
+ mmc-hs200-1_8v;
+ ti,clkbuf-sel = <0x7>;
--- /dev/null
+From 9c6b73fc72e19c449147233587833ce20f84b660 Mon Sep 17 00:00:00 2001
+From: Judith Mendez <jm@ti.com>
+Date: Tue, 29 Apr 2025 11:33:37 -0500
+Subject: arm64: dts: ti: k3-am62p-j722s-common-main: Set eMMC clock parent to default
+
+From: Judith Mendez <jm@ti.com>
+
+commit 9c6b73fc72e19c449147233587833ce20f84b660 upstream.
+
+Set eMMC clock parents to the defaults which is MAIN_PLL0_HSDIV5_CLKOUT
+for eMMC. This change is necessary since DM is not implementing the
+correct procedure to switch PLL clock source for eMMC and MMC CLK mux is
+not glich-free. As a preventative action, lets switch back to the defaults.
+
+Fixes: b5080c7c1f7e ("arm64: dts: ti: k3-am62p: Add nodes for more IPs")
+Cc: stable@vger.kernel.org
+Signed-off-by: Judith Mendez <jm@ti.com>
+Acked-by: Udit Kumar <u-kumar1@ti.com>
+Acked-by: Bryan Brattlof <bb@ti.com>
+Link: https://lore.kernel.org/r/20250429163337.15634-4-jm@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
++++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
+@@ -564,8 +564,6 @@
+ power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
+ clock-names = "clk_ahb", "clk_xin";
+- assigned-clocks = <&k3_clks 57 2>;
+- assigned-clock-parents = <&k3_clks 57 4>;
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
--- /dev/null
+From c68ab54a89a8c935732589a35ea2596e2329f167 Mon Sep 17 00:00:00 2001
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Date: Tue, 15 Apr 2025 16:43:26 +0530
+Subject: arm64: dts: ti: k3-am62x: Remove clock-names property from IMX219 overlay
+
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+
+commit c68ab54a89a8c935732589a35ea2596e2329f167 upstream.
+
+The IMX219 sensor device tree bindings do not include a clock-names
+property. Remove the incorrectly added clock-names entry to avoid
+dtbs_check warnings.
+
+Fixes: 4111db03dc05 ("arm64: dts: ti: k3-am62x: Add overlay for IMX219")
+Cc: stable@vger.kernel.org
+Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
+Reviewed-by: Jai Luthra <jai.luthra@linux.dev>
+Link: https://lore.kernel.org/r/20250415111328.3847502-6-y-abhilashchandra@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso
++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso
+@@ -39,7 +39,6 @@
+ reg = <0x10>;
+
+ clocks = <&clk_imx219_fixed>;
+- clock-names = "xclk";
+
+ reset-gpios = <&exp1 13 GPIO_ACTIVE_HIGH>;
+
--- /dev/null
+From 7b75dd2029ee01a8c11fcf4d97f3ccebbef9f8eb Mon Sep 17 00:00:00 2001
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Date: Tue, 15 Apr 2025 16:43:27 +0530
+Subject: arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in IMX219 overlay
+
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+
+commit 7b75dd2029ee01a8c11fcf4d97f3ccebbef9f8eb upstream.
+
+The IMX219 device tree overlay incorrectly defined an I2C switch
+instead of an I2C mux. According to the DT bindings, the correct
+terminology and node definition should use "i2c-mux" instead of
+"i2c-switch". Hence, update the same to avoid dtbs_check warnings.
+
+Fixes: 4111db03dc05 ("arm64: dts: ti: k3-am62x: Add overlay for IMX219")
+Cc: stable@vger.kernel.org
+Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
+Reviewed-by: Jai Luthra <jai.luthra@linux.dev>
+Link: https://lore.kernel.org/r/20250415111328.3847502-7-y-abhilashchandra@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso
++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso
+@@ -22,7 +22,7 @@
+ #size-cells = <0>;
+ status = "okay";
+
+- i2c-switch@71 {
++ i2c-mux@71 {
+ compatible = "nxp,pca9543";
+ #address-cells = <1>;
+ #size-cells = <0>;
--- /dev/null
+From b22cc402d38774ccc552d18e762c25dde02f7be0 Mon Sep 17 00:00:00 2001
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Date: Tue, 15 Apr 2025 16:43:28 +0530
+Subject: arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in OV5640 overlay
+
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+
+commit b22cc402d38774ccc552d18e762c25dde02f7be0 upstream.
+
+The OV5640 device tree overlay incorrectly defined an I2C switch
+instead of an I2C mux. According to the DT bindings, the correct
+terminology and node definition should use "i2c-mux" instead of
+"i2c-switch". Hence, update the same to avoid dtbs_check warnings.
+
+Fixes: 635ed9715194 ("arm64: dts: ti: k3-am62x: Add overlays for OV5640")
+Cc: stable@vger.kernel.org
+Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
+Reviewed-by: Jai Luthra <jai.luthra@linux.dev>
+Link: https://lore.kernel.org/r/20250415111328.3847502-8-y-abhilashchandra@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso | 2 +-
+ arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso
++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso
+@@ -22,7 +22,7 @@
+ #size-cells = <0>;
+ status = "okay";
+
+- i2c-switch@71 {
++ i2c-mux@71 {
+ compatible = "nxp,pca9543";
+ #address-cells = <1>;
+ #size-cells = <0>;
+--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso
++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso
+@@ -22,7 +22,7 @@
+ #size-cells = <0>;
+ status = "okay";
+
+- i2c-switch@71 {
++ i2c-mux@71 {
+ compatible = "nxp,pca9543";
+ #address-cells = <1>;
+ #size-cells = <0>;
--- /dev/null
+From f55c9f087cc2e2252d44ffd9d58def2066fc176e Mon Sep 17 00:00:00 2001
+From: Judith Mendez <jm@ti.com>
+Date: Tue, 29 Apr 2025 12:30:08 -0500
+Subject: arm64: dts: ti: k3-am65-main: Add missing taps to sdhci0
+
+From: Judith Mendez <jm@ti.com>
+
+commit f55c9f087cc2e2252d44ffd9d58def2066fc176e upstream.
+
+For am65x, add missing ITAPDLYSEL values for Default Speed and High
+Speed SDR modes to sdhci0 node according to the device datasheet [0].
+
+[0] https://www.ti.com/lit/gpn/am6548
+
+Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
+Cc: stable@vger.kernel.org
+Signed-off-by: Judith Mendez <jm@ti.com>
+Reviewed-by: Moteen Shah <m-shah@ti.com>
+Link: https://lore.kernel.org/r/20250429173009.33994-1-jm@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
++++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+@@ -449,6 +449,8 @@
+ ti,otap-del-sel-mmc-hs = <0x0>;
+ ti,otap-del-sel-ddr52 = <0x5>;
+ ti,otap-del-sel-hs200 = <0x5>;
++ ti,itap-del-sel-legacy = <0xa>;
++ ti,itap-del-sel-mmc-hs = <0x1>;
+ ti,itap-del-sel-ddr52 = <0x0>;
+ dma-coherent;
+ status = "disabled";
--- /dev/null
+From 7edf0a4d3bb7f5cd84f172b76c380c4259bb4ef8 Mon Sep 17 00:00:00 2001
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Date: Tue, 15 Apr 2025 16:43:23 +0530
+Subject: arm64: dts: ti: k3-am68-sk: Fix regulator hierarchy
+
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+
+commit 7edf0a4d3bb7f5cd84f172b76c380c4259bb4ef8 upstream.
+
+Update the vin-supply of the TLV71033 regulator from LM5141 (vsys_3v3)
+to LM61460 (vsys_5v0) to match the schematics. Add a fixed regulator
+node for the LM61460 5V supply to support this change.
+
+AM68-SK schematics: https://www.ti.com/lit/zip/sprr463
+
+Fixes: a266c180b398 ("arm64: dts: ti: k3-am68-sk: Add support for AM68 SK base board")
+Cc: stable@vger.kernel.org
+Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
+Reviewed-by: Udit Kumar <u-kumar1@ti.com>
+Link: https://lore.kernel.org/r/20250415111328.3847502-3-y-abhilashchandra@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 13 ++++++++++++-
+ 1 file changed, 12 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
++++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+@@ -44,6 +44,17 @@
+ regulator-boot-on;
+ };
+
++ vsys_5v0: regulator-vsys5v0 {
++ /* Output of LM61460 */
++ compatible = "regulator-fixed";
++ regulator-name = "vsys_5v0";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ vin-supply = <&vusb_main>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
+ vsys_3v3: regulator-vsys3v3 {
+ /* Output of LM5141 */
+ compatible = "regulator-fixed";
+@@ -76,7 +87,7 @@
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+- vin-supply = <&vsys_3v3>;
++ vin-supply = <&vsys_5v0>;
+ gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
+ states = <1800000 0x0>,
+ <3300000 0x1>;
--- /dev/null
+From 97b67cc102dc2cc8aa39a569c22a196e21af5a21 Mon Sep 17 00:00:00 2001
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Date: Tue, 15 Apr 2025 16:43:22 +0530
+Subject: arm64: dts: ti: k3-j721e-sk: Add DT nodes for power regulators
+
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+
+commit 97b67cc102dc2cc8aa39a569c22a196e21af5a21 upstream.
+
+Add device tree nodes for two power regulators on the J721E SK board.
+vsys_5v0: A fixed regulator representing the 5V supply output from the
+LM61460 and vdd_sd_dv: A GPIO-controlled TLV71033 regulator.
+
+J721E-SK schematics: https://www.ti.com/lit/zip/sprr438
+
+Fixes: 1bfda92a3a36 ("arm64: dts: ti: Add support for J721E SK")
+Cc: stable@vger.kernel.org
+Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Reviewed-by: Udit Kumar <u-kumar1@ti.com>
+Link: https://lore.kernel.org/r/20250415111328.3847502-2-y-abhilashchandra@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 31 +++++++++++++++++++++++++++++++
+ 1 file changed, 31 insertions(+)
+
+--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+@@ -184,6 +184,17 @@
+ regulator-boot-on;
+ };
+
++ vsys_5v0: fixedregulator-vsys5v0 {
++ /* Output of LM61460 */
++ compatible = "regulator-fixed";
++ regulator-name = "vsys_5v0";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ vin-supply = <&vusb_main>;
++ regulator-always-on;
++ regulator-boot-on;
++ };
++
+ vdd_mmc1: fixedregulator-sd {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+@@ -211,6 +222,20 @@
+ <3300000 0x1>;
+ };
+
++ vdd_sd_dv: gpio-regulator-TLV71033 {
++ compatible = "regulator-gpio";
++ pinctrl-names = "default";
++ pinctrl-0 = <&vdd_sd_dv_pins_default>;
++ regulator-name = "tlv71033";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ vin-supply = <&vsys_5v0>;
++ gpios = <&main_gpio0 118 GPIO_ACTIVE_HIGH>;
++ states = <1800000 0x0>,
++ <3300000 0x1>;
++ };
++
+ transceiver1: can-phy1 {
+ compatible = "ti,tcan1042";
+ #phy-cells = <0>;
+@@ -613,6 +638,12 @@
+ >;
+ };
+
++ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
++ pinctrl-single,pins = <
++ J721E_IOPAD(0x1dc, PIN_OUTPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */
++ >;
++ };
++
+ wkup_uart0_pins_default: wkup-uart0-default-pins {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */
--- /dev/null
+From c6a20a250200da6fcaf80fe945b7b92cba8cfe0f Mon Sep 17 00:00:00 2001
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Date: Tue, 15 Apr 2025 16:43:25 +0530
+Subject: arm64: dts: ti: k3-j721e-sk: Add requiried voltage supplies for IMX219
+
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+
+commit c6a20a250200da6fcaf80fe945b7b92cba8cfe0f upstream.
+
+The device tree overlay for the IMX219 sensor requires three voltage
+supplies to be defined: VANA (analog), VDIG (digital core), and VDDL
+(digital I/O). Add the corresponding voltage supply definitions to
+avoid dtbs_check warnings.
+
+Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219")
+Cc: stable@vger.kernel.org
+Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Link: https://lore.kernel.org/r/20250415111328.3847502-5-y-abhilashchandra@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso | 33 +++++++++++++++
+ 1 file changed, 33 insertions(+)
+
+--- a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso
++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso
+@@ -19,6 +19,33 @@
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
++
++ reg_2p8v: regulator-2p8v {
++ compatible = "regulator-fixed";
++ regulator-name = "2P8V";
++ regulator-min-microvolt = <2800000>;
++ regulator-max-microvolt = <2800000>;
++ vin-supply = <&vdd_sd_dv>;
++ regulator-always-on;
++ };
++
++ reg_1p8v: regulator-1p8v {
++ compatible = "regulator-fixed";
++ regulator-name = "1P8V";
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <1800000>;
++ vin-supply = <&vdd_sd_dv>;
++ regulator-always-on;
++ };
++
++ reg_1p2v: regulator-1p2v {
++ compatible = "regulator-fixed";
++ regulator-name = "1P2V";
++ regulator-min-microvolt = <1200000>;
++ regulator-max-microvolt = <1200000>;
++ vin-supply = <&vdd_sd_dv>;
++ regulator-always-on;
++ };
+ };
+
+ &csi_mux {
+@@ -34,6 +61,9 @@
+ reg = <0x10>;
+
+ clocks = <&clk_imx219_fixed>;
++ VANA-supply = <®_2p8v>;
++ VDIG-supply = <®_1p8v>;
++ VDDL-supply = <®_1p2v>;
+
+ port {
+ csi2_cam0: endpoint {
+@@ -55,6 +85,9 @@
+ reg = <0x10>;
+
+ clocks = <&clk_imx219_fixed>;
++ VANA-supply = <®_2p8v>;
++ VDIG-supply = <®_1p8v>;
++ VDDL-supply = <®_1p2v>;
+
+ port {
+ csi2_cam1: endpoint {
--- /dev/null
+From 24ab76e55ef15450c6681a2b5db4d78f45200939 Mon Sep 17 00:00:00 2001
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Date: Tue, 15 Apr 2025 16:43:24 +0530
+Subject: arm64: dts: ti: k3-j721e-sk: Remove clock-names property from IMX219 overlay
+
+From: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+
+commit 24ab76e55ef15450c6681a2b5db4d78f45200939 upstream.
+
+The IMX219 sensor device tree bindings do not include a clock-names
+property. Remove the incorrectly added clock-names entry to avoid
+dtbs_check warnings.
+
+Fixes: f767eb918096 ("arm64: dts: ti: k3-j721e-sk: Add overlay for IMX219")
+Cc: stable@vger.kernel.org
+Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
+Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
+Reviewed-by: Jai Luthra <jai.luthra@linux.dev>
+Link: https://lore.kernel.org/r/20250415111328.3847502-4-y-abhilashchandra@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso
++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso
+@@ -34,7 +34,6 @@
+ reg = <0x10>;
+
+ clocks = <&clk_imx219_fixed>;
+- clock-names = "xclk";
+
+ port {
+ csi2_cam0: endpoint {
+@@ -56,7 +55,6 @@
+ reg = <0x10>;
+
+ clocks = <&clk_imx219_fixed>;
+- clock-names = "xclk";
+
+ port {
+ csi2_cam1: endpoint {
--- /dev/null
+From 9d76be5828be44ed7a104cc21b4f875be4a63322 Mon Sep 17 00:00:00 2001
+From: Siddharth Vadapalli <s-vadapalli@ti.com>
+Date: Thu, 17 Apr 2025 18:02:43 +0530
+Subject: arm64: dts: ti: k3-j722s-evm: Enable "serdes_wiz0" and "serdes_wiz1"
+
+From: Siddharth Vadapalli <s-vadapalli@ti.com>
+
+commit 9d76be5828be44ed7a104cc21b4f875be4a63322 upstream.
+
+In preparation for disabling "serdes_wiz0" and "serdes_wiz1" device-tree
+nodes in the SoC file, enable them in the board file. The motivation for
+this change is that of following the existing convention of disabling
+nodes in the SoC file and only enabling the required ones in the board
+file.
+
+Fixes: 485705df5d5f ("arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM")
+Cc: stable@vger.kernel.org
+Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
+Reviewed-by: Udit Kumar <u-kumar1@ti.com>
+Link: https://lore.kernel.org/r/20250417123246.2733923-2-s-vadapalli@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
++++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+@@ -815,6 +815,10 @@
+ <J722S_SERDES1_LANE0_PCIE0_LANE0>;
+ };
+
++&serdes_wiz0 {
++ status = "okay";
++};
++
+ &serdes0 {
+ status = "okay";
+ serdes0_usb_link: phy@0 {
+@@ -826,6 +830,10 @@
+ };
+ };
+
++&serdes_wiz1 {
++ status = "okay";
++};
++
+ &serdes1 {
+ status = "okay";
+ serdes1_pcie_link: phy@0 {
--- /dev/null
+From 320d8a84f6f045dc876d4c2983f9024c7ac9d6df Mon Sep 17 00:00:00 2001
+From: Siddharth Vadapalli <s-vadapalli@ti.com>
+Date: Thu, 17 Apr 2025 18:02:44 +0530
+Subject: arm64: dts: ti: k3-j722s-main: Disable "serdes_wiz0" and "serdes_wiz1"
+
+From: Siddharth Vadapalli <s-vadapalli@ti.com>
+
+commit 320d8a84f6f045dc876d4c2983f9024c7ac9d6df upstream.
+
+Since "serdes0" and "serdes1" which are the sub-nodes of "serdes_wiz0"
+and "serdes_wiz1" respectively, have been disabled in the SoC file already,
+and, given that these sub-nodes will only be enabled in a board file if the
+board utilizes any of the SERDES instances and the peripherals bound to
+them, we end up in a situation where the board file doesn't explicitly
+disable "serdes_wiz0" and "serdes_wiz1". As a consequence of this, the
+following errors show up when booting Linux:
+
+ wiz bus@f0000:phy@f000000: probe with driver wiz failed with error -12
+ ...
+ wiz bus@f0000:phy@f010000: probe with driver wiz failed with error -12
+
+To not only fix the above, but also, in order to follow the convention of
+disabling device-tree nodes in the SoC file and enabling them in the board
+files for those boards which require them, disable "serdes_wiz0" and
+"serdes_wiz1" device-tree nodes.
+
+Fixes: 628e0a0118e6 ("arm64: dts: ti: k3-j722s-main: Add SERDES and PCIe support")
+Cc: stable@vger.kernel.org
+Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
+Reviewed-by: Udit Kumar <u-kumar1@ti.com>
+Link: https://lore.kernel.org/r/20250417123246.2733923-3-s-vadapalli@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
++++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+@@ -32,6 +32,8 @@
+ assigned-clocks = <&k3_clks 279 1>;
+ assigned-clock-parents = <&k3_clks 279 5>;
+
++ status = "disabled";
++
+ serdes0: serdes@f000000 {
+ compatible = "ti,j721e-serdes-10g";
+ reg = <0x0f000000 0x00010000>;
+@@ -70,6 +72,8 @@
+ assigned-clocks = <&k3_clks 280 1>;
+ assigned-clock-parents = <&k3_clks 280 5>;
+
++ status = "disabled";
++
+ serdes1: serdes@f010000 {
+ compatible = "ti,j721e-serdes-10g";
+ reg = <0x0f010000 0x00010000>;
--- /dev/null
+From 3b62bd1fde50d54cc59015e14869e6cc3d6899e0 Mon Sep 17 00:00:00 2001
+From: Siddharth Vadapalli <s-vadapalli@ti.com>
+Date: Wed, 23 Apr 2025 20:46:12 +0530
+Subject: arm64: dts: ti: k3-j784s4-j742s2-main-common: Fix length of serdes_ln_ctrl
+
+From: Siddharth Vadapalli <s-vadapalli@ti.com>
+
+commit 3b62bd1fde50d54cc59015e14869e6cc3d6899e0 upstream.
+
+Commit under Fixes corrected the "mux-reg-masks" property but did not
+update the "length" field of the "reg" property to account for the
+newly added register offsets which extend the region. Fix this.
+
+Fixes: 38e7f9092efb ("arm64: dts: ti: k3-j784s4-j742s2-main-common: Fix serdes_ln_ctrl reg-masks")
+Cc: stable@vger.kernel.org
+Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
+Reviewed-by: Udit Kumar <u-kumar1@ti.com>
+Link: https://lore.kernel.org/r/20250423151612.48848-1-s-vadapalli@ti.com
+Signed-off-by: Nishanth Menon <nm@ti.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
++++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
+@@ -77,7 +77,7 @@
+
+ serdes_ln_ctrl: mux-controller@4080 {
+ compatible = "reg-mux";
+- reg = <0x00004080 0x30>;
++ reg = <0x00004080 0x50>;
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */
+ <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */
--- /dev/null
+From ac9fe7dd8e730a103ae4481147395cc73492d786 Mon Sep 17 00:00:00 2001
+From: Pedro Tammela <pctammela@mojatatu.com>
+Date: Thu, 22 May 2025 15:14:47 -0300
+Subject: net_sched: hfsc: Address reentrant enqueue adding class to eltree twice
+
+From: Pedro Tammela <pctammela@mojatatu.com>
+
+commit ac9fe7dd8e730a103ae4481147395cc73492d786 upstream.
+
+Savino says:
+ "We are writing to report that this recent patch
+ (141d34391abbb315d68556b7c67ad97885407547) [1]
+ can be bypassed, and a UAF can still occur when HFSC is utilized with
+ NETEM.
+
+ The patch only checks the cl->cl_nactive field to determine whether
+ it is the first insertion or not [2], but this field is only
+ incremented by init_vf [3].
+
+ By using HFSC_RSC (which uses init_ed) [4], it is possible to bypass the
+ check and insert the class twice in the eltree.
+ Under normal conditions, this would lead to an infinite loop in
+ hfsc_dequeue for the reasons we already explained in this report [5].
+
+ However, if TBF is added as root qdisc and it is configured with a
+ very low rate,
+ it can be utilized to prevent packets from being dequeued.
+ This behavior can be exploited to perform subsequent insertions in the
+ HFSC eltree and cause a UAF."
+
+To fix both the UAF and the infinite loop, with netem as an hfsc child,
+check explicitly in hfsc_enqueue whether the class is already in the eltree
+whenever the HFSC_RSC flag is set.
+
+[1] https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=141d34391abbb315d68556b7c67ad97885407547
+[2] https://elixir.bootlin.com/linux/v6.15-rc5/source/net/sched/sch_hfsc.c#L1572
+[3] https://elixir.bootlin.com/linux/v6.15-rc5/source/net/sched/sch_hfsc.c#L677
+[4] https://elixir.bootlin.com/linux/v6.15-rc5/source/net/sched/sch_hfsc.c#L1574
+[5] https://lore.kernel.org/netdev/8DuRWwfqjoRDLDmBMlIfbrsZg9Gx50DHJc1ilxsEBNe2D6NMoigR_eIRIG0LOjMc3r10nUUZtArXx4oZBIdUfZQrwjcQhdinnMis_0G7VEk=@willsroot.io/T/#u
+
+Fixes: 37d9cf1a3ce3 ("sched: Fix detection of empty queues in child qdiscs")
+Reported-by: Savino Dicanosa <savy@syst3mfailure.io>
+Reported-by: William Liu <will@willsroot.io>
+Acked-by: Jamal Hadi Salim <jhs@mojatatu.com>
+Tested-by: Victor Nogueira <victor@mojatatu.com>
+Signed-off-by: Pedro Tammela <pctammela@mojatatu.com>
+Link: https://patch.msgid.link/20250522181448.1439717-2-pctammela@mojatatu.com
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ net/sched/sch_hfsc.c | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+--- a/net/sched/sch_hfsc.c
++++ b/net/sched/sch_hfsc.c
+@@ -175,6 +175,11 @@ struct hfsc_sched {
+
+ #define HT_INFINITY 0xffffffffffffffffULL /* infinite time value */
+
++static bool cl_in_el_or_vttree(struct hfsc_class *cl)
++{
++ return ((cl->cl_flags & HFSC_FSC) && cl->cl_nactive) ||
++ ((cl->cl_flags & HFSC_RSC) && !RB_EMPTY_NODE(&cl->el_node));
++}
+
+ /*
+ * eligible tree holds backlogged classes being sorted by their eligible times.
+@@ -1040,6 +1045,8 @@ hfsc_change_class(struct Qdisc *sch, u32
+ if (cl == NULL)
+ return -ENOBUFS;
+
++ RB_CLEAR_NODE(&cl->el_node);
++
+ err = tcf_block_get(&cl->block, &cl->filter_list, sch, extack);
+ if (err) {
+ kfree(cl);
+@@ -1572,7 +1579,7 @@ hfsc_enqueue(struct sk_buff *skb, struct
+ sch->qstats.backlog += len;
+ sch->q.qlen++;
+
+- if (first && !cl->cl_nactive) {
++ if (first && !cl_in_el_or_vttree(cl)) {
+ if (cl->cl_flags & HFSC_RSC)
+ init_ed(cl, len);
+ if (cl->cl_flags & HFSC_FSC)
--- /dev/null
+From 8c138a189f6db295ceb32258d46ac061df0823e5 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Mon, 19 May 2025 11:56:04 +0100
+Subject: perf/arm-cmn: Add CMN S3 ACPI binding
+
+From: Robin Murphy <robin.murphy@arm.com>
+
+commit 8c138a189f6db295ceb32258d46ac061df0823e5 upstream.
+
+An ACPI binding for CMN S3 was not yet finalised when the driver support
+was originally written, but v1.2 of DEN0093 "ACPI for Arm Components"
+has at last been published; support ACPI systems using the proper HID.
+
+Cc: stable@vger.kernel.org
+Fixes: 0dc2f4963f7e ("perf/arm-cmn: Support CMN S3")
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Link: https://lore.kernel.org/r/7dafe147f186423020af49d7037552ee59c60e97.1747652164.git.robin.murphy@arm.com
+Signed-off-by: Will Deacon <will@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/perf/arm-cmn.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/perf/arm-cmn.c
++++ b/drivers/perf/arm-cmn.c
+@@ -2650,6 +2650,7 @@ static const struct acpi_device_id arm_c
+ { "ARMHC600", PART_CMN600 },
+ { "ARMHC650" },
+ { "ARMHC700" },
++ { "ARMHC003" },
+ {}
+ };
+ MODULE_DEVICE_TABLE(acpi, arm_cmn_acpi_match);
--- /dev/null
+From 11b0f576e0cbde6a12258f2af6753b17b8df342b Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Thu, 8 May 2025 16:16:40 +0100
+Subject: perf/arm-cmn: Fix REQ2/SNP2 mixup
+
+From: Robin Murphy <robin.murphy@arm.com>
+
+commit 11b0f576e0cbde6a12258f2af6753b17b8df342b upstream.
+
+Somehow the encodings for REQ2/SNP2 channels in XP events
+got mixed up... Unmix them.
+
+CC: stable@vger.kernel.org
+Fixes: 23760a014417 ("perf/arm-cmn: Add CMN-700 support")
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Link: https://lore.kernel.org/r/087023e9737ac93d7ec7a841da904758c254cb01.1746717400.git.robin.murphy@arm.com
+Signed-off-by: Will Deacon <will@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/perf/arm-cmn.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/perf/arm-cmn.c
++++ b/drivers/perf/arm-cmn.c
+@@ -727,8 +727,8 @@ static umode_t arm_cmn_event_attr_is_vis
+
+ if ((chan == 5 && cmn->rsp_vc_num < 2) ||
+ (chan == 6 && cmn->dat_vc_num < 2) ||
+- (chan == 7 && cmn->snp_vc_num < 2) ||
+- (chan == 8 && cmn->req_vc_num < 2))
++ (chan == 7 && cmn->req_vc_num < 2) ||
++ (chan == 8 && cmn->snp_vc_num < 2))
+ return 0;
+ }
+
+@@ -884,8 +884,8 @@ static umode_t arm_cmn_event_attr_is_vis
+ _CMN_EVENT_XP(pub_##_name, (_event) | (4 << 5)), \
+ _CMN_EVENT_XP(rsp2_##_name, (_event) | (5 << 5)), \
+ _CMN_EVENT_XP(dat2_##_name, (_event) | (6 << 5)), \
+- _CMN_EVENT_XP(snp2_##_name, (_event) | (7 << 5)), \
+- _CMN_EVENT_XP(req2_##_name, (_event) | (8 << 5))
++ _CMN_EVENT_XP(req2_##_name, (_event) | (7 << 5)), \
++ _CMN_EVENT_XP(snp2_##_name, (_event) | (8 << 5))
+
+ #define CMN_EVENT_XP_DAT(_name, _event) \
+ _CMN_EVENT_XP_PORT(dat_##_name, (_event) | (3 << 5)), \
--- /dev/null
+From 597704e201068db3d104de3c7a4d447ff8209127 Mon Sep 17 00:00:00 2001
+From: Robin Murphy <robin.murphy@arm.com>
+Date: Mon, 12 May 2025 18:11:54 +0100
+Subject: perf/arm-cmn: Initialise cmn->cpu earlier
+
+From: Robin Murphy <robin.murphy@arm.com>
+
+commit 597704e201068db3d104de3c7a4d447ff8209127 upstream.
+
+For all the complexity of handling affinity for CPU hotplug, what we've
+apparently managed to overlook is that arm_cmn_init_irqs() has in fact
+always been setting the *initial* affinity of all IRQs to CPU 0, not the
+CPU we subsequently choose for event scheduling. Oh dear.
+
+Cc: stable@vger.kernel.org
+Fixes: 0ba64770a2f2 ("perf: Add Arm CMN-600 PMU driver")
+Signed-off-by: Robin Murphy <robin.murphy@arm.com>
+Reviewed-by: Ilkka Koskinen <ilkka@os.amperecomputing.com>
+Link: https://lore.kernel.org/r/b12fccba6b5b4d2674944f59e4daad91cd63420b.1747069914.git.robin.murphy@arm.com
+Signed-off-by: Will Deacon <will@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/perf/arm-cmn.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/perf/arm-cmn.c
++++ b/drivers/perf/arm-cmn.c
+@@ -2557,6 +2557,7 @@ static int arm_cmn_probe(struct platform
+
+ cmn->dev = &pdev->dev;
+ cmn->part = (unsigned long)device_get_match_data(cmn->dev);
++ cmn->cpu = cpumask_local_spread(0, dev_to_node(cmn->dev));
+ platform_set_drvdata(pdev, cmn);
+
+ if (cmn->part == PART_CMN600 && has_acpi_companion(cmn->dev)) {
+@@ -2584,7 +2585,6 @@ static int arm_cmn_probe(struct platform
+ if (err)
+ return err;
+
+- cmn->cpu = cpumask_local_spread(0, dev_to_node(cmn->dev));
+ cmn->pmu = (struct pmu) {
+ .module = THIS_MODULE,
+ .parent = cmn->dev,
can-kvaser_pciefd-force-irq-edge-in-case-of-nested-irq.patch
+arm64-dts-socfpga-agilex5-fix-gpio0-address.patch
+arm64-dts-rockchip-fix-internal-usb-hub-instability-on-rk3399-puma.patch
+arm64-dts-qcom-ipq9574-add-missing-properties-for-cryptobam.patch
+arm64-dts-qcom-sa8775p-add-missing-properties-for-cryptobam.patch
+arm64-dts-qcom-sa8775p-remove-extra-entries-from-the-iommus-property.patch
+arm64-dts-qcom-sa8775p-remove-cdsp-compute-cb-10.patch
+arm64-dts-qcom-sm8350-fix-typo-in-pil_camera_mem-node.patch
+arm64-dts-qcom-sm8450-add-missing-properties-for-cryptobam.patch
+arm64-dts-qcom-sm8550-add-missing-properties-for-cryptobam.patch
+arm64-dts-qcom-sm8650-add-missing-properties-for-cryptobam.patch
+arm64-dts-qcom-x1e001de-devkit-fix-vreg_l2j_1p2-voltage.patch
+arm64-dts-qcom-x1e001de-devkit-mark-l12b-and-l15b-always-on.patch
+arm64-dts-qcom-x1e80100-asus-vivobook-s15-fix-vreg_l2j_1p2-voltage.patch
+arm64-dts-qcom-x1e80100-dell-xps13-9345-mark-l12b-and-l15b-always-on.patch
+arm64-dts-qcom-x1e80100-hp-omnibook-x14-enable-smb2360-0-and-1.patch
+arm64-dts-qcom-x1e80100-hp-omnibook-x14-fix-vreg_l2j_1p2-voltage.patch
+arm64-dts-qcom-x1e80100-hp-x14-mark-l12b-and-l15b-always-on.patch
+arm64-dts-qcom-x1e80100-lenovo-yoga-slim7x-fix-vreg_l2j_1p2-voltage.patch
+arm64-dts-qcom-x1e80100-qcp-fix-vreg_l2j_1p2-voltage.patch
+arm64-dts-qcom-x1e80100-qcp-mark-l12b-and-l15b-always-on.patch
+arm64-dts-qcom-x1e80100-yoga-slim7x-mark-l12b-and-l15b-always-on.patch
+arm64-dts-qcom-x1e80100-fix-video-thermal-zone.patch
+arm64-dts-qcom-x1e80100-apply-consistent-critical-thermal-shutdown.patch
+arm64-dts-qcom-x1e80100-add-gpu-cooling.patch
+arm64-dts-qcom-x1e80100-fix-pcie-3rd-controller-dbi-size.patch
+arm64-dts-ti-k3-am62-main-set-emmc-clock-parent-to-default.patch
+arm64-dts-ti-k3-am62a-main-set-emmc-clock-parent-to-default.patch
+arm64-dts-ti-k3-am62p-j722s-common-main-set-emmc-clock-parent-to-default.patch
+arm64-dts-ti-k3-am62x-remove-clock-names-property-from-imx219-overlay.patch
+arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-imx219-overlay.patch
+arm64-dts-ti-k3-am62x-rename-i2c-switch-to-i2c-mux-in-ov5640-overlay.patch
+arm64-dts-ti-k3-am65-main-add-missing-taps-to-sdhci0.patch
+arm64-dts-ti-k3-am68-sk-fix-regulator-hierarchy.patch
+arm64-dts-ti-k3-j721e-sk-add-dt-nodes-for-power-regulators.patch
+arm64-dts-ti-k3-j721e-sk-remove-clock-names-property-from-imx219-overlay.patch
+arm64-dts-ti-k3-j721e-sk-add-requiried-voltage-supplies-for-imx219.patch
+arm64-dts-ti-k3-j722s-evm-enable-serdes_wiz0-and-serdes_wiz1.patch
+arm64-dts-ti-k3-j722s-main-disable-serdes_wiz0-and-serdes_wiz1.patch
+arm64-dts-ti-k3-j784s4-j742s2-main-common-fix-length-of-serdes_ln_ctrl.patch
+net_sched-hfsc-address-reentrant-enqueue-adding-class-to-eltree-twice.patch
+perf-arm-cmn-fix-req2-snp2-mixup.patch
+perf-arm-cmn-initialise-cmn-cpu-earlier.patch
+perf-arm-cmn-add-cmn-s3-acpi-binding.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
