Hexagon (target/hexagon) register fields

Declare bitfields within registers such as user status register (USR)

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1612763186-18161-12-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

diff --git a/target/hexagon/reg_fields.c b/target/hexagon/reg_fields.c
new file mode 100644 (file)
index 0000000..bdcab79
--- /dev/null
+++ b/target/hexagon/reg_fields.c
@@ -0,0 +1,27 @@
+/*
+ *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "reg_fields.h"
+
+const RegField reg_field_info[] = {
+#define DEF_REG_FIELD(TAG, START, WIDTH)    \
+      { START, WIDTH },
+#include "reg_fields_def.h.inc"
+      { 0, 0 }
+#undef DEF_REG_FIELD
+};

diff --git a/target/hexagon/reg_fields.h b/target/hexagon/reg_fields.h
new file mode 100644 (file)
index 0000000..d3c86c9
--- /dev/null
+++ b/target/hexagon/reg_fields.h
@@ -0,0 +1,36 @@
+/*
+ *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_REG_FIELDS_H
+#define HEXAGON_REG_FIELDS_H
+
+typedef struct {
+    int offset;
+    int width;
+} RegField;
+
+extern const RegField reg_field_info[];
+
+enum {
+#define DEF_REG_FIELD(TAG, START, WIDTH) \
+    TAG,
+#include "reg_fields_def.h.inc"
+    NUM_REG_FIELDS
+#undef DEF_REG_FIELD
+};
+
+#endif

diff --git a/target/hexagon/reg_fields_def.h.inc b/target/hexagon/reg_fields_def.h.inc
new file mode 100644 (file)
index 0000000..f2a58d4
--- /dev/null
+++ b/target/hexagon/reg_fields_def.h.inc
@@ -0,0 +1,41 @@
+/*
+ *  Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/*
+ * For registers that have individual fields, explain them here
+ *   DEF_REG_FIELD(tag,
+ *                 bit start offset,
+ *                 width
+ */
+
+/* USR fields */
+DEF_REG_FIELD(USR_OVF,            0, 1)
+DEF_REG_FIELD(USR_FPINVF,         1, 1)
+DEF_REG_FIELD(USR_FPDBZF,         2, 1)
+DEF_REG_FIELD(USR_FPOVFF,         3, 1)
+DEF_REG_FIELD(USR_FPUNFF,         4, 1)
+DEF_REG_FIELD(USR_FPINPF,         5, 1)
+
+DEF_REG_FIELD(USR_LPCFG,          8, 2)
+
+DEF_REG_FIELD(USR_FPRND,         22, 2)
+
+DEF_REG_FIELD(USR_FPINVE,        25, 1)
+DEF_REG_FIELD(USR_FPDBZE,        26, 1)
+DEF_REG_FIELD(USR_FPOVFE,        27, 1)
+DEF_REG_FIELD(USR_FPUNFE,        28, 1)
+DEF_REG_FIELD(USR_FPINPE,        29, 1)