RISC-V: Add optimized dump check of VLS reduc tests

Add more dump check to robostify the tests.

Committed.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vls/reduc-1.c: Add dump check.
	* gcc.target/riscv/rvv/autovec/vls/reduc-10.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-11.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-12.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-13.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-14.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-15.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-17.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-18.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-19.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-2.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-20.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-21.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-3.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-5.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-6.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-7.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/vls/reduc-9.c: Ditto.

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c
index 2db25a2b05d4347d08a37d95aef60d2720c53666..b6d8e6a51eddb8168f9abfa3affb22b4e43cdaa1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -29,3 +29,15 @@ DEF_REDUC_PLUS (uint8_t, 4096)
 
 /* { dg-final { scan-assembler-times {vredsum\.vs} 22 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c
index cdbbe11f611785e2020695da420b23f0a7b006a7..22aace423cf5817ebf2c89a776c8c87f59a10e35 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -48,3 +48,15 @@ DEF_REDUC_MAXMIN (uint32_t, min, <, 1024)
 /* { dg-final { scan-assembler-times {vredmin\.vs} 9 } } */
 /* { dg-final { scan-assembler-times {vredminu\.vs} 9 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c
index d2040315d329efc0b7567b32353794dfe6826c8f..0e8518a473f7f5e9253d0935843572d5b65e34ff 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -44,3 +44,15 @@ DEF_REDUC_MAXMIN (uint64_t, min, <, 512)
 /* { dg-final { scan-assembler-times {vredmin\.vs} 8 } } */
 /* { dg-final { scan-assembler-times {vredminu\.vs} 8 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c
index 97660d223f7d661d60fbb45e7ace1e8c7b8e6c6d..aabbe71f8a358ea95e553d6773bfbd51443fbaaa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -28,3 +28,15 @@ DEF_REDUC_MAXMIN (_Float16, min, <, 2048)
 /* { dg-final { scan-assembler-times {vfredmax\.vs} 10 } } */
 /* { dg-final { scan-assembler-times {vfredmin\.vs} 10 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c
index e4bc95cc3266fdc0359fb475f068688c8d236d8c..c3f5f2c7c6dc302550cb84e5f889f1871b0fbbae 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -26,3 +26,15 @@ DEF_REDUC_MAXMIN (float, min, <, 1024)
 /* { dg-final { scan-assembler-times {vfredmax\.vs} 9 } } */
 /* { dg-final { scan-assembler-times {vfredmin\.vs} 9 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c
index c90e9266280f6c533b117d98e499f53396224364..61eea795ab96bb6c32acd6b4e49e9b5c06979ce3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -24,3 +24,15 @@ DEF_REDUC_MAXMIN (double, min, <, 512)
 /* { dg-final { scan-assembler-times {vfredmax\.vs} 8 } } */
 /* { dg-final { scan-assembler-times {vfredmin\.vs} 8 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c
index 65863f7e5fedcf0bff997259657dd9582c68aaf1..a368e5576d185b935aac237a4c4df44fafae0064 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -79,3 +79,15 @@ DEF_REDUC_BITWISE (uint8_t, xor, ^=, 4096)
 /* { dg-final { scan-assembler-times {vredor\.vs} 22 } } */
 /* { dg-final { scan-assembler-times {vredxor\.vs} 22 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c
index c6c57146ecd5bf37aa419c8a1a396ea41decee3c..c528d69ad8e7dc09bbbe57e8847afb9c15633dd2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -73,3 +73,15 @@ DEF_REDUC_BITWISE (uint16_t, xor, ^=, 2048)
 /* { dg-final { scan-assembler-times {vredor\.vs} 20 } } */
 /* { dg-final { scan-assembler-times {vredxor\.vs} 20 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c
index 75983076ace046b411ec7c0457ebcff48b982d14..d0f00e66dfc570d154333c1992d473949f848782 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -67,3 +67,15 @@ DEF_REDUC_BITWISE (uint32_t, xor, ^=, 1024)
 /* { dg-final { scan-assembler-times {vredor\.vs} 18 } } */
 /* { dg-final { scan-assembler-times {vredxor\.vs} 18 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c
index 30dfad6708c456e1112f190ab520fa5fa19b972c..ba8fb520364dc323297ba3ca0f4b60aee2233726 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -61,3 +61,15 @@ DEF_REDUC_BITWISE (uint64_t, xor, ^=, 512)
 /* { dg-final { scan-assembler-times {vredor\.vs} 16 } } */
 /* { dg-final { scan-assembler-times {vredxor\.vs} 16 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c
index a2de4d10d4ed9ffb41e3190c27abc968e8a7d54b..2048b636910105e9afd7654480a84da55f7f20b6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -16,3 +16,15 @@ DEF_REDUC_PLUS (_Float16, 2048)
 
 /* { dg-final { scan-assembler-times {vfredosum\.vs} 10 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c
index 9ffdec94865dc1ce6f84a5741ec1e8b087b551c7..158aaf3c006f1ccfbbfe42551c2c8b27d5471f8a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -27,3 +27,15 @@ DEF_REDUC_PLUS (uint16_t, 2048)
 
 /* { dg-final { scan-assembler-times {vredsum\.vs} 20 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c
index 8e1164a6dc21b4f1268778bd517eea68fc52846c..bfc328da56839a6a6d0da037e2c95bd3726821fb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -15,3 +15,15 @@ DEF_REDUC_PLUS (float, 1024)
 
 /* { dg-final { scan-assembler-times {vfredosum\.vs} 9 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c
index 727cf85224d76b8f6e86edceae82dec3d9b21288..8228590fa3b755e27b00a70d59fd3dcf927dfe5c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-21.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -14,3 +14,15 @@ DEF_REDUC_PLUS (float, 512)
 
 /* { dg-final { scan-assembler-times {vfredosum\.vs} 8 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c
index 63f9697e2458ffefbd993216cb1db769d934287e..d24f2ef5b1edc5991a2b6f20efec2fb21867a138 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -25,3 +25,15 @@ DEF_REDUC_PLUS (uint32_t, 1024)
 
 /* { dg-final { scan-assembler-times {vredsum\.vs} 18 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c
index 8cd2728d2369f9c6aa932741e4e7b38883b9dcb6..1143bdec46d7a23e4c25fc5566e5e4e3ddaa6fa3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -23,3 +23,15 @@ DEF_REDUC_PLUS (uint64_t, 512)
 
 /* { dg-final { scan-assembler-times {vredsum\.vs} 16 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c
index 09b69fc92dbe37430b02487937ab0c15aae95516..0370b4dff7c5c7a40b39e90908727ac6b8345bdb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -16,3 +16,15 @@ DEF_REDUC_PLUS (_Float16, 2048)
 
 /* { dg-final { scan-assembler-times {vfredusum\.vs} 10 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c
index 56b13dc221e0dfda7e5bd55fa47b21c6f91d0c0c..954e39d76a4d35f559903669e9db96133b7147e1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -15,3 +15,15 @@ DEF_REDUC_PLUS (float, 1024)
 
 /* { dg-final { scan-assembler-times {vfredusum\.vs} 9 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c
index eb5de35df12f3958731391fd1667dcefa4270768..6762db8011a44aa46bc09d969109d51c87cfe661 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -ffast-math -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -14,3 +14,15 @@ DEF_REDUC_PLUS (double, 512)
 
 /* { dg-final { scan-assembler-times {vfredusum\.vs} 8 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c
index cf4f9cc9f2a522474ead1ab92dc206efde38ef4b..905c9d0a833a7c7e9c924dcca5f562f782c6c4b3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -56,3 +56,15 @@ DEF_REDUC_MAXMIN (uint8_t, min, <, 4096)
 /* { dg-final { scan-assembler-times {vredmin\.vs} 11 } } */
 /* { dg-final { scan-assembler-times {vredminu\.vs} 11 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c
index 64164586ef685e364bc8e9d17e76403830d33c2f..be7c32358ceb9eb12b1fbb53ba3b1210482443c4 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/reduc-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8" } */
+/* { dg-options "-march=rv64gcv_zvfh_zvl4096b -mabi=lp64d -O3 --param=riscv-autovec-lmul=m8 -fdump-tree-optimized-details" } */
 
 #include "def.h"
 
@@ -52,3 +52,15 @@ DEF_REDUC_MAXMIN (uint16_t, min, <, 2048)
 /* { dg-final { scan-assembler-times {vredmin\.vs} 10 } } */
 /* { dg-final { scan-assembler-times {vredminu\.vs} 10 } } */
 /* { dg-final { scan-assembler-not {csrr} } } */
+/* { dg-final { scan-tree-dump-not "1,1" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2,2" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4,4" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "16,16" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "32,32" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "64,64" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "128,128" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "256,256" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "512,512" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "1024,1024" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "2048,2048" "optimized" } } */
+/* { dg-final { scan-tree-dump-not "4096,4096" "optimized" } } */