GPIB_82350A_REGION));
dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n",
driver_name, a_priv->gpib_base);
- tms_priv->iobase = a_priv->gpib_base + TMS9914_BASE_REG;
+ tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG;
a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device,
SRAM_82350A_REGION),
pci_resource_len(a_priv->pci_device,
pci_resource_len(a_priv->pci_device, GPIB_REGION));
dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n",
driver_name, a_priv->gpib_base);
- tms_priv->iobase = a_priv->gpib_base + TMS9914_BASE_REG;
+ tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG;
a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, SRAM_REGION),
pci_resource_len(a_priv->pci_device, SRAM_REGION));
dev_dbg(board->gpib_dev, "%s: sram base address remapped to 0x%p\n",
switch (cb_priv->pci_chip) {
case PCI_CHIP_AMCC_S5933:
cb_priv->amcc_iobase = pci_resource_start(cb_priv->pci_device, 0);
- nec_priv->iobase = (void *)(pci_resource_start(cb_priv->pci_device, 1));
+ nec_priv->iobase = pci_resource_start(cb_priv->pci_device, 1);
cb_priv->fifo_iobase = pci_resource_start(cb_priv->pci_device, 2);
break;
case PCI_CHIP_QUANCOM:
- nec_priv->iobase = (void *)(pci_resource_start(cb_priv->pci_device, 0));
- cb_priv->fifo_iobase = (unsigned long)nec_priv->iobase;
+ nec_priv->iobase = pci_resource_start(cb_priv->pci_device, 0);
+ cb_priv->fifo_iobase = nec_priv->iobase;
break;
default:
pr_err("cb7210: bug! unhandled pci_chip=%i\n", cb_priv->pci_chip);
return retval;
cb_priv = board->private_data;
nec_priv = &cb_priv->nec7210_priv;
- if (request_region((unsigned long)config->ibbase, cb7210_iosize, "cb7210") == 0) {
- pr_err("gpib: ioports starting at 0x%p are already in use\n", config->ibbase);
+ if (request_region(config->ibbase, cb7210_iosize, "cb7210") == 0) {
+ pr_err("gpib: ioports starting at 0x%u are already in use\n", config->ibbase);
return -EIO;
}
nec_priv->iobase = config->ibbase;
(unsigned long)curr_dev->resource[0]->start);
return -EIO;
}
- nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start;
+ nec_priv->iobase = curr_dev->resource[0]->start;
cb_priv->fifo_iobase = curr_dev->resource[0]->start;
if (request_irq(curr_dev->irq, cb7210_interrupt, IRQF_SHARED,
HS_STATUS = 0x8, /* HS_STATUS register */
};
-static inline unsigned long nec7210_iobase(const struct cb7210_priv *cb_priv)
+static inline u32 nec7210_iobase(const struct cb7210_priv *cb_priv)
{
- return (unsigned long)(cb_priv->nec7210_priv.iobase);
+ return cb_priv->nec7210_priv.iobase;
}
static inline int cb7210_page_in_bits(unsigned int page)
cec_priv->plx_iobase = pci_resource_start(cec_priv->pci_device, 1);
pr_info(" plx9050 base address 0x%lx\n", cec_priv->plx_iobase);
- nec_priv->iobase = (void *)(pci_resource_start(cec_priv->pci_device, 3));
- pr_info(" nec7210 base address 0x%p\n", nec_priv->iobase);
+ nec_priv->iobase = pci_resource_start(cec_priv->pci_device, 3);
+ pr_info(" nec7210 base address 0x%x\n", nec_priv->iobase);
isr_flags |= IRQF_SHARED;
if (request_irq(cec_priv->pci_device->irq, cec_interrupt, isr_flags, "pci-gpib", board)) {
if (WARN_ON_ONCE(sizeof(void *) > sizeof(base_addr)))
return -EFAULT;
- config->ibbase = (void *)(unsigned long)(base_addr);
+ config->ibbase = base_addr;
return 0;
}
}
e_priv->gpib_iomem_res = res;
- nec_priv->iobase = ioremap(e_priv->gpib_iomem_res->start,
+ nec_priv->mmiobase = ioremap(e_priv->gpib_iomem_res->start,
resource_size(e_priv->gpib_iomem_res));
- pr_info("gpib: iobase %lx remapped to %p, length=%d\n",
- (unsigned long)e_priv->gpib_iomem_res->start,
- nec_priv->iobase, (int)resource_size(e_priv->gpib_iomem_res));
- if (!nec_priv->iobase) {
+ pr_info("gpib: mmiobase %llx remapped to %p, length=%d\n",
+ (u64)e_priv->gpib_iomem_res->start,
+ nec_priv->mmiobase, (int)resource_size(e_priv->gpib_iomem_res));
+ if (!nec_priv->mmiobase) {
dev_err(&fluke_gpib_pdev->dev, "Could not map I/O memory\n");
return -ENOMEM;
}
gpib_free_pseudo_irq(board);
nec_priv = &e_priv->nec7210_priv;
- if (nec_priv->iobase) {
+ if (nec_priv->mmiobase) {
fluke_paged_write_byte(e_priv, 0, ISR0_IMR0, ISR0_IMR0_PAGE);
nec7210_board_reset(nec_priv, board);
}
{
u8 retval;
- retval = readl(nec_priv->iobase + register_num * nec_priv->offset);
+ retval = readl(nec_priv->mmiobase + register_num * nec_priv->offset);
return retval;
}
static inline void fluke_write_byte_nolock(struct nec7210_priv *nec_priv, uint8_t data,
int register_num)
{
- writel(data, nec_priv->iobase + register_num * nec_priv->offset);
+ writel(data, nec_priv->mmiobase + register_num * nec_priv->offset);
}
static inline uint8_t fluke_paged_read_byte(struct fluke_priv *e_priv,
}
e_priv->gpib_iomem_res = res;
- nec_priv->iobase = ioremap(e_priv->gpib_iomem_res->start,
+ nec_priv->mmiobase = ioremap(e_priv->gpib_iomem_res->start,
resource_size(e_priv->gpib_iomem_res));
- if (!nec_priv->iobase) {
+ if (!nec_priv->mmiobase) {
dev_err(board->dev, "Could not map I/O memory for gpib\n");
return -ENOMEM;
}
- dev_info(board->dev, "iobase 0x%lx remapped to %p, length=%ld\n",
- (unsigned long)e_priv->gpib_iomem_res->start,
- nec_priv->iobase, (unsigned long)resource_size(e_priv->gpib_iomem_res));
+ dev_info(board->dev, "iobase %pr remapped to %p\n",
+ e_priv->gpib_iomem_res, nec_priv->mmiobase);
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma_fifos");
if (!res) {
free_irq(e_priv->irq, board);
if (e_priv->fifo_base)
fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);
- if (nec_priv->iobase) {
+ if (nec_priv->mmiobase) {
write_byte(nec_priv, 0, ISR0_IMR0_REG);
nec7210_board_reset(nec_priv, board);
}
if (e_priv->fifo_base)
iounmap(e_priv->fifo_base);
- if (nec_priv->iobase)
- iounmap(nec_priv->iobase);
+ if (nec_priv->mmiobase)
+ iounmap(nec_priv->mmiobase);
if (e_priv->dma_port_res) {
release_mem_region(e_priv->dma_port_res->start,
resource_size(e_priv->dma_port_res));
e_priv->gpib_iomem_res = &pci_device->resource[gpib_control_status_pci_resource_index];
e_priv->dma_port_res = &pci_device->resource[gpib_fifo_pci_resource_index];
- nec_priv->iobase = ioremap(pci_resource_start(pci_device,
+ nec_priv->mmiobase = ioremap(pci_resource_start(pci_device,
gpib_control_status_pci_resource_index),
pci_resource_len(pci_device,
gpib_control_status_pci_resource_index));
dev_info(board->dev, "base address for gpib control/status registers remapped to 0x%p\n",
- nec_priv->iobase);
+ nec_priv->mmiobase);
if (e_priv->dma_port_res->flags & IORESOURCE_MEM) {
e_priv->fifo_base = ioremap(pci_resource_start(pci_device,
free_irq(e_priv->irq, board);
if (e_priv->fifo_base)
fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG);
- if (nec_priv->iobase) {
+ if (nec_priv->mmiobase) {
write_byte(nec_priv, 0, ISR0_IMR0_REG);
nec7210_board_reset(nec_priv, board);
}
if (e_priv->fifo_base)
iounmap(e_priv->fifo_base);
- if (nec_priv->iobase)
- iounmap(nec_priv->iobase);
+ if (nec_priv->mmiobase)
+ iounmap(nec_priv->mmiobase);
if (e_priv->dma_port_res || e_priv->gpib_iomem_res)
pci_release_regions(to_pci_dev(board->dev));
if (board->dev)
static inline uint8_t gpib_cs_read_byte(struct nec7210_priv *nec_priv,
unsigned int register_num)
{
- return readb(nec_priv->iobase + register_num * nec_priv->offset);
+ return readb(nec_priv->mmiobase + register_num * nec_priv->offset);
}
static inline void gpib_cs_write_byte(struct nec7210_priv *nec_priv, uint8_t data,
unsigned int register_num)
{
- writeb(data, nec_priv->iobase + register_num * nec_priv->offset);
+ writeb(data, nec_priv->mmiobase + register_num * nec_priv->offset);
}
static inline uint16_t fifos_read(struct fmh_priv *fmh_priv, int register_num)
*/
#include "hp82335.h"
+#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/sched.h>
#include <linux/module.h>
{
struct tms9914_priv *tms_priv = &hp_priv->tms9914_priv;
- writeb(0, tms_priv->iobase + HPREG_INTR_CLEAR);
+ writeb(0, tms_priv->mmiobase + HPREG_INTR_CLEAR);
}
int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config)
struct hp82335_priv *hp_priv;
struct tms9914_priv *tms_priv;
int retval;
- const unsigned long upper_iomem_base = (unsigned long)config->ibbase + hp82335_rom_size;
+ const unsigned long upper_iomem_base = config->ibbase + hp82335_rom_size;
board->status = 0;
tms_priv->write_byte = hp82335_write_byte;
tms_priv->offset = 1;
- switch ((unsigned long)(config->ibbase)) {
+ switch (config->ibbase) {
case 0xc4000:
case 0xc8000:
case 0xcc000:
case 0xfc000:
break;
default:
- pr_err("hp82335: invalid base io address 0x%p\n", config->ibbase);
+ pr_err("hp82335: invalid base io address 0x%u\n", config->ibbase);
return -EINVAL;
}
if (!request_mem_region(upper_iomem_base, hp82335_upper_iomem_size, "hp82335")) {
return -EBUSY;
}
hp_priv->raw_iobase = upper_iomem_base;
- tms_priv->iobase = ioremap(upper_iomem_base, hp82335_upper_iomem_size);
+ tms_priv->mmiobase = ioremap(upper_iomem_base, hp82335_upper_iomem_size);
pr_info("hp82335: upper half of 82335 iomem region 0x%lx remapped to 0x%p\n",
- hp_priv->raw_iobase, tms_priv->iobase);
+ hp_priv->raw_iobase, tms_priv->mmiobase);
retval = request_irq(config->ibirq, hp82335_interrupt, 0, "hp82335", board);
if (retval) {
hp82335_clear_interrupt(hp_priv);
- writeb(INTR_ENABLE, tms_priv->iobase + HPREG_CCR);
+ writeb(INTR_ENABLE, tms_priv->mmiobase + HPREG_CCR);
tms9914_online(board, tms_priv);
tms_priv = &hp_priv->tms9914_priv;
if (hp_priv->irq)
free_irq(hp_priv->irq, board);
- if (tms_priv->iobase) {
- writeb(0, tms_priv->iobase + HPREG_CCR);
+ if (tms_priv->mmiobase) {
+ writeb(0, tms_priv->mmiobase + HPREG_CCR);
tms9914_board_reset(tms_priv);
- iounmap((void *)tms_priv->iobase);
+ iounmap(tms_priv->mmiobase);
}
if (hp_priv->raw_iobase)
release_mem_region(hp_priv->raw_iobase, hp82335_upper_iomem_size);
static uint8_t hp_82341_read_byte(struct tms9914_priv *priv, unsigned int register_num)
{
- return inb((unsigned long)(priv->iobase) + register_num);
+ return inb(priv->iobase + register_num);
}
static void hp_82341_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
{
- outb(data, (unsigned long)(priv->iobase) + register_num);
+ outb(data, priv->iobase + register_num);
}
static int hp_82341_find_isapnp_board(struct pnp_dev **dev)
{
struct hp_82341_priv *hp_priv;
struct tms9914_priv *tms_priv;
- unsigned long start_addr;
- void *iobase;
+ u32 start_addr;
+ u32 iobase;
int irq;
int i;
int retval;
if (retval < 0)
return retval;
hp_priv->pnp_dev = dev;
- iobase = (void *)(pnp_port_start(dev, 0));
+ iobase = pnp_port_start(dev, 0);
irq = pnp_irq(dev, 0);
hp_priv->hw_version = HW_VERSION_82341D;
hp_priv->io_region_offset = 0x8;
hp_priv->hw_version = HW_VERSION_82341C;
hp_priv->io_region_offset = 0x400;
}
- pr_info("hp_82341: base io 0x%p\n", iobase);
+ pr_info("hp_82341: base io 0x%u\n", iobase);
for (i = 0; i < hp_82341_num_io_regions; ++i) {
- start_addr = (unsigned long)(iobase) + i * hp_priv->io_region_offset;
+ start_addr = iobase + i * hp_priv->io_region_offset;
if (!request_region(start_addr, hp_82341_region_iosize, "hp_82341")) {
pr_err("hp_82341: failed to allocate io ports 0x%lx-0x%lx\n",
start_addr,
}
hp_priv->iobase[i] = start_addr;
}
- tms_priv->iobase = (void *)(hp_priv->iobase[2]);
+ tms_priv->iobase = hp_priv->iobase[2];
if (hp_priv->hw_version == HW_VERSION_82341D) {
retval = isapnp_cfg_begin(hp_priv->pnp_dev->card->number,
hp_priv->pnp_dev->number);
void *init_data;
int init_data_length;
/* IO base address to use for non-pnp cards (set by core, driver should make local copy) */
- void *ibbase;
+ u32 ibbase;
+ void __iomem *mmibbase;
/* IRQ to use for non-pnp cards (set by core, driver should make local copy) */
unsigned int ibirq;
/* dma channel to use for non-pnp cards (set by core, driver should make local copy) */
/* struct used to provide variables local to a nec7210 chip */
struct nec7210_priv {
- void *iobase;
+#ifdef CONFIG_HAS_IOPORT
+ u32 iobase;
+#endif
+ void __iomem *mmiobase;
unsigned int offset; // offset between successive nec7210 io addresses
unsigned int dma_channel;
u8 *dma_buffer;
/* struct used to provide variables local to a tms9914 chip */
struct tms9914_priv {
- void *iobase;
+#ifdef CONFIG_HAS_IOPORT
+ u32 iobase;
+#endif
+ void __iomem *mmiobase;
unsigned int offset; // offset between successive tms9914 io addresses
unsigned int dma_channel;
// software copy of bits written to interrupt mask registers
/* inb/outb wrappers */
static inline unsigned int ines_inb(struct ines_priv *priv, unsigned int register_number)
{
- return inb((unsigned long)(priv->nec7210_priv.iobase) +
+ return inb(priv->nec7210_priv.iobase +
register_number * priv->nec7210_priv.offset);
}
static inline void ines_outb(struct ines_priv *priv, unsigned int value,
unsigned int register_number)
{
- outb(value, (unsigned long)(priv->nec7210_priv.iobase) +
+ outb(value, priv->nec7210_priv.iobase +
register_number * priv->nec7210_priv.offset);
}
struct nec7210_priv *nec_priv = &priv->nec7210_priv;
if (priv->pci_chip_type == PCI_CHIP_QUANCOM) {
- if ((inb((unsigned long)nec_priv->iobase +
+ if ((inb(nec_priv->iobase +
QUANCOM_IRQ_CONTROL_STATUS_REG) &
QUANCOM_IRQ_ASSERTED_BIT))
- outb(QUANCOM_IRQ_ENABLE_BIT, (unsigned long)(nec_priv->iobase) +
+ outb(QUANCOM_IRQ_ENABLE_BIT, nec_priv->iobase +
QUANCOM_IRQ_CONTROL_STATUS_REG);
}
if (pci_request_regions(ines_priv->pci_device, "ines-gpib"))
return -1;
- nec_priv->iobase = (void *)(pci_resource_start(ines_priv->pci_device,
- found_id.gpib_region));
+ nec_priv->iobase = pci_resource_start(ines_priv->pci_device,
+ found_id.gpib_region);
ines_priv->pci_chip_type = found_id.pci_chip_type;
nec_priv->offset = found_id.io_offset;
}
break;
case PCI_CHIP_QUANCOM:
- outb(QUANCOM_IRQ_ENABLE_BIT, (unsigned long)(nec_priv->iobase) +
+ outb(QUANCOM_IRQ_ENABLE_BIT, nec_priv->iobase +
QUANCOM_IRQ_CONTROL_STATUS_REG);
break;
case PCI_CHIP_QUICKLOGIC5030:
ines_priv = board->private_data;
nec_priv = &ines_priv->nec7210_priv;
- if (!request_region((unsigned long)config->ibbase, ines_isa_iosize, "ines_gpib")) {
- pr_err("ines_gpib: ioports at 0x%p already in use\n", config->ibbase);
+ if (!request_region(config->ibbase, ines_isa_iosize, "ines_gpib")) {
+ pr_err("ines_gpib: ioports at 0x%x already in use\n", config->ibbase);
return -1;
}
nec_priv->iobase = config->ibbase;
break;
case PCI_CHIP_QUANCOM:
if (nec_priv->iobase)
- outb(0, (unsigned long)(nec_priv->iobase) +
+ outb(0, nec_priv->iobase +
QUANCOM_IRQ_CONTROL_STATUS_REG);
break;
default:
free_irq(ines_priv->irq, board);
if (nec_priv->iobase) {
nec7210_board_reset(nec_priv, board);
- release_region((unsigned long)(nec_priv->iobase), ines_isa_iosize);
+ release_region(nec_priv->iobase, ines_isa_iosize);
}
}
ines_free_private(board);
return -1;
}
- nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start;
+ nec_priv->iobase = curr_dev->resource[0]->start;
nec7210_board_reset(nec_priv, board);
free_irq(ines_priv->irq, board);
if (nec_priv->iobase) {
nec7210_board_reset(nec_priv, board);
- release_region((unsigned long)(nec_priv->iobase), ines_pcmcia_iosize);
+ release_region(nec_priv->iobase, ines_pcmcia_iosize);
}
}
ines_free_private(board);
static int usb_gpib_attach(gpib_board_t *board, const gpib_board_config_t *config)
{
int retval, j;
- int base = (long)config->ibbase;
+ u32 base = config->ibbase;
char *device_path;
int match;
struct usb_device *udev;
/* wrappers for io */
uint8_t nec7210_ioport_read_byte(struct nec7210_priv *priv, unsigned int register_num)
{
- return inb((unsigned long)(priv->iobase) + register_num * priv->offset);
+ return inb(priv->iobase + register_num * priv->offset);
}
EXPORT_SYMBOL(nec7210_ioport_read_byte);
*/
nec7210_locking_ioport_write_byte(priv, data, register_num);
else
- outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset);
+ outb(data, priv->iobase + register_num * priv->offset);
}
EXPORT_SYMBOL(nec7210_ioport_write_byte);
unsigned long flags;
spin_lock_irqsave(&priv->register_page_lock, flags);
- retval = inb((unsigned long)(priv->iobase) + register_num * priv->offset);
+ retval = inb(priv->iobase + register_num * priv->offset);
spin_unlock_irqrestore(&priv->register_page_lock, flags);
return retval;
}
spin_lock_irqsave(&priv->register_page_lock, flags);
if (register_num == AUXMR)
udelay(1);
- outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset);
+ outb(data, priv->iobase + register_num * priv->offset);
spin_unlock_irqrestore(&priv->register_page_lock, flags);
}
EXPORT_SYMBOL(nec7210_locking_ioport_write_byte);
uint8_t nec7210_iomem_read_byte(struct nec7210_priv *priv, unsigned int register_num)
{
- return readb(priv->iobase + register_num * priv->offset);
+ return readb(priv->mmiobase + register_num * priv->offset);
}
EXPORT_SYMBOL(nec7210_iomem_read_byte);
*/
nec7210_locking_iomem_write_byte(priv, data, register_num);
else
- writeb(data, priv->iobase + register_num * priv->offset);
+ writeb(data, priv->mmiobase + register_num * priv->offset);
}
EXPORT_SYMBOL(nec7210_iomem_write_byte);
unsigned long flags;
spin_lock_irqsave(&priv->register_page_lock, flags);
- retval = readb(priv->iobase + register_num * priv->offset);
+ retval = readb(priv->mmiobase + register_num * priv->offset);
spin_unlock_irqrestore(&priv->register_page_lock, flags);
return retval;
}
spin_lock_irqsave(&priv->register_page_lock, flags);
if (register_num == AUXMR)
udelay(1);
- writeb(data, priv->iobase + register_num * priv->offset);
+ writeb(data, priv->mmiobase + register_num * priv->offset);
spin_unlock_irqrestore(&priv->register_page_lock, flags);
}
EXPORT_SYMBOL(nec7210_locking_iomem_write_byte);
nec_priv = &pc2_priv->nec7210_priv;
nec_priv->offset = pc2_reg_offset;
- if (request_region((unsigned long)config->ibbase, pc2_iosize, "pc2") == 0) {
+ if (request_region(config->ibbase, pc2_iosize, "pc2") == 0) {
pr_err("gpib: ioports are already in use\n");
return -1;
}
free_irq(pc2_priv->irq, board);
if (nec_priv->iobase) {
nec7210_board_reset(nec_priv, board);
- release_region((unsigned long)(nec_priv->iobase), pc2_iosize);
+ release_region(nec_priv->iobase, pc2_iosize);
}
if (nec_priv->dma_buffer) {
dma_free_coherent(board->dev, nec_priv->dma_buffer_length,
nec_priv = &pc2_priv->nec7210_priv;
nec_priv->offset = pc2a_reg_offset;
- switch ((unsigned long)(config->ibbase)) {
+ switch (config->ibbase) {
case 0x02e1:
case 0x22e1:
case 0x42e1:
case 0x62e1:
break;
default:
- pr_err("PCIIa base range invalid, must be one of 0x[0246]2e1, but is 0x%p\n",
+ pr_err("PCIIa base range invalid, must be one of 0x[0246]2e1, but is 0x%d\n",
config->ibbase);
return -1;
}
unsigned int err = 0;
for (i = 0; i < num_registers; i++) {
- if (check_region((unsigned long)config->ibbase + i * pc2a_reg_offset, 1))
+ if (check_region(config->ibbase + i * pc2a_reg_offset, 1))
err++;
}
if (config->ibirq && check_region(pc2a_clear_intr_iobase + config->ibirq, 1))
}
#endif
for (i = 0; i < num_registers; i++) {
- if (!request_region((unsigned long)config->ibbase +
+ if (!request_region(config->ibbase +
i * pc2a_reg_offset, 1, "pc2a")) {
pr_err("gpib: ioports are already in use");
for (j = 0; j < i; j++)
- release_region((unsigned long)(config->ibbase) +
+ release_region(config->ibbase +
j * pc2a_reg_offset, 1);
return -1;
}
if (nec_priv->iobase) {
nec7210_board_reset(nec_priv, board);
for (i = 0; i < num_registers; i++)
- release_region((unsigned long)nec_priv->iobase +
+ release_region(nec_priv->iobase +
i * pc2a_reg_offset, 1);
}
if (pc2_priv->clear_intr_addr)
// wrapper for inb
uint8_t tms9914_ioport_read_byte(struct tms9914_priv *priv, unsigned int register_num)
{
- return inb((unsigned long)(priv->iobase) + register_num * priv->offset);
+ return inb(priv->iobase + register_num * priv->offset);
}
EXPORT_SYMBOL_GPL(tms9914_ioport_read_byte);
// wrapper for outb
void tms9914_ioport_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
{
- outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset);
+ outb(data, priv->iobase + register_num * priv->offset);
if (register_num == AUXCR)
udelay(1);
}
// wrapper for readb
uint8_t tms9914_iomem_read_byte(struct tms9914_priv *priv, unsigned int register_num)
{
- return readb(priv->iobase + register_num * priv->offset);
+ return readb(priv->mmiobase + register_num * priv->offset);
}
EXPORT_SYMBOL_GPL(tms9914_iomem_read_byte);
// wrapper for writeb
void tms9914_iomem_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
{
- writeb(data, priv->iobase + register_num * priv->offset);
+ writeb(data, priv->mmiobase + register_num * priv->offset);
if (register_num == AUXCR)
udelay(1);
}
struct pci_dev *pcidev;
unsigned long mite_phys_addr;
- void *mite_io_addr;
+ void __iomem *mite_io_addr;
unsigned long daq_phys_addr;
- void *daq_io_addr;
+ void __iomem *daq_io_addr;
int DMA_CheckNearEnd;
/* paged io */
static inline unsigned int tnt_paged_readb(struct tnt4882_priv *priv, unsigned long offset)
{
- iowrite8(AUX_PAGEIN, priv->nec7210_priv.iobase + AUXMR * priv->nec7210_priv.offset);
+ iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset);
udelay(1);
- return ioread8(priv->nec7210_priv.iobase + offset);
+ return ioread8(priv->nec7210_priv.mmiobase + offset);
}
static inline void tnt_paged_writeb(struct tnt4882_priv *priv, unsigned int value,
unsigned long offset)
{
- iowrite8(AUX_PAGEIN, priv->nec7210_priv.iobase + AUXMR * priv->nec7210_priv.offset);
+ iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset);
udelay(1);
- iowrite8(value, priv->nec7210_priv.iobase + offset);
+ iowrite8(value, priv->nec7210_priv.mmiobase + offset);
}
/* readb/writeb wrappers */
static inline unsigned short tnt_readb(struct tnt4882_priv *priv, unsigned long offset)
{
- void *address = priv->nec7210_priv.iobase + offset;
+ void *address = priv->nec7210_priv.mmiobase + offset;
unsigned long flags;
unsigned short retval;
spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock;
static inline void tnt_writeb(struct tnt4882_priv *priv, unsigned short value, unsigned long offset)
{
- void *address = priv->nec7210_priv.iobase + offset;
+ void *address = priv->nec7210_priv.mmiobase + offset;
unsigned long flags;
spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock;
while (fifo_word_available(tnt_priv) && count + 2 <= num_bytes) {
short word;
- word = ioread16(nec_priv->iobase + FIFOB);
+ word = ioread16(nec_priv->mmiobase + FIFOB);
buffer[count++] = word & 0xff;
buffer[count++] = (word >> 8) & 0xff;
}
word = buffer[count++] & 0xff;
if (count < length)
word |= (buffer[count++] << 8) & 0xff00;
- iowrite16(word, nec_priv->iobase + FIFOB);
+ iowrite16(word, nec_priv->mmiobase + FIFOB);
}
// avoid unnecessary HR_NFF interrupts
// tnt_priv->imr3_bits |= HR_NFF;
return retval;
}
- nec_priv->iobase = tnt_priv->mite->daq_io_addr;
+ nec_priv->mmiobase = tnt_priv->mite->daq_io_addr;
// get irq
if (request_irq(mite_irq(tnt_priv->mite), tnt4882_interrupt, isr_flags,
if (tnt_priv) {
nec_priv = &tnt_priv->nec7210_priv;
- if (nec_priv->iobase)
+ if (nec_priv->mmiobase)
tnt4882_board_reset(tnt_priv, board);
if (tnt_priv->irq)
free_irq(tnt_priv->irq, board);
struct tnt4882_priv *tnt_priv;
struct nec7210_priv *nec_priv;
int isr_flags = 0;
- void *iobase;
+ u32 iobase;
int irq;
board->status = 0;
if (retval < 0)
return retval;
tnt_priv->pnp_dev = dev;
- iobase = (void *)(pnp_port_start(dev, 0));
+ iobase = pnp_port_start(dev, 0);
irq = pnp_irq(dev, 0);
} else {
iobase = config->ibbase;
irq = config->ibirq;
}
// allocate ioports
- if (!request_region((unsigned long)(iobase), atgpib_iosize, "atgpib")) {
+ if (!request_region(iobase, atgpib_iosize, "atgpib")) {
pr_err("tnt4882: failed to allocate ioports\n");
return -1;
}
- nec_priv->iobase = ioport_map(iobase, atgpib_iosize);
- if (!nec_priv->iobase)
+ nec_priv->mmiobase = ioport_map(iobase, atgpib_iosize);
+ if (!nec_priv->mmiobase)
return -1;
// get irq
tnt4882_board_reset(tnt_priv, board);
if (tnt_priv->irq)
free_irq(tnt_priv->irq, board);
+ if (nec_priv->mmiobase)
+ ioport_unmap(nec_priv->mmiobase);
if (nec_priv->iobase)
- ioport_unmap(nec_priv->iobase);
- if (nec_priv->iobase)
- release_region((unsigned long)(nec_priv->iobase), atgpib_iosize);
+ release_region(nec_priv->iobase, atgpib_iosize);
if (tnt_priv->pnp_dev)
pnp_device_detach(tnt_priv->pnp_dev);
}
return -EIO;
}
- nec_priv->iobase = ioport_map(curr_dev->resource[0]->start,
+ nec_priv->mmiobase = ioport_map(curr_dev->resource[0]->start,
resource_size(curr_dev->resource[0]));
- if (!nec_priv->iobase)
+ if (!nec_priv->mmiobase)
return -1;
// get irq
nec_priv = &tnt_priv->nec7210_priv;
if (tnt_priv->irq)
free_irq(tnt_priv->irq, board);
- if (nec_priv->iobase)
- ioport_unmap(nec_priv->iobase);
+ if (nec_priv->mmiobase)
+ ioport_unmap(nec_priv->mmiobase);
if (nec_priv->iobase) {
tnt4882_board_reset(tnt_priv, board);
- release_region((unsigned long)nec_priv->iobase, pcmcia_gpib_iosize);
+ release_region(nec_priv->iobase, pcmcia_gpib_iosize);
}
}
tnt4882_free_private(board);