called from riscv_update_subset./
The IMPLICIT_EXTS, +extension[version] [,...,+extension_n[version_n]]
- -extension [,...,-extension_n],
+ (Deprecated) -extension [,...,-extension_n],
full ISA. */
static bool
return false;
}
- if (explicit_subset == NULL
- && (strcmp (subset, "i") == 0
- || strcmp (subset, "e") == 0
- || strcmp (subset, "g") == 0))
+ if (explicit_subset == NULL)
{
- rps->error_handler
- (_("%scannot + or - base extension `%s' in %s `%s'"),
- errmsg_internal, subset, errmsg_caller, implicit_exts);
- free (subset);
- return false;
+ if (removed)
+ {
+ rps->error_handler
+ (_("%sdeprecated - extension `%s' in %s `%s'"),
+ errmsg_internal, subset, errmsg_caller, implicit_exts);
+ free (subset);
+ return false;
+ }
+ else if (strcmp (subset, "i") == 0
+ || strcmp (subset, "e") == 0
+ || strcmp (subset, "g") == 0)
+ {
+ rps->error_handler
+ (_("%scannot + base extension `%s' in %s `%s'"),
+ errmsg_internal, subset, errmsg_caller, implicit_exts);
+ free (subset);
+ return false;
+ }
}
if (removed)
return no_conflict;
}
-/* Add/Remove an extension to/from the subset list. This is used for
- the .option rvc or norvc, and .option arch directives. */
+/* Add an extension to/from the subset list. This is used for the .option rvc
+ and .option arch directives. */
bool
riscv_update_subset (riscv_parse_subset_t *rps,
return riscv_update_subset1 (rps, NULL, str);
}
+/* Called from .option norvc directives. */
+
+bool
+riscv_update_subset_norvc (riscv_parse_subset_t *rps)
+{
+ return riscv_update_subset1 (rps, rps->subset_list->head,
+ "-c,-zca,-zcd,-zcf,-zcb,-zce,-zcmp,-zcmt,"
+ "-zcmop,-zclsd");
+}
+
/* Check if the FEATURE subset is supported or not in the subset list.
Return true if it is supported; Otherwise, return false. */
extern bool
riscv_update_subset (riscv_parse_subset_t *, const char *);
+extern bool
+riscv_update_subset_norvc (riscv_parse_subset_t *);
+
extern bool
riscv_subset_supports (riscv_parse_subset_t *, const char *);
* Support for x86 AVX10.2 256 bit rounding has been dropped, as all the
hardware would directly support 512 bit vecotr width.
+* For RISC-V, the ".option arch, -ext" format is deprecated due to its
+ controversial use.
+
* For RISC-V, stop generating mapping symbols $x and replace with $x<isa>. The
$x was defined to have the same ISA as previous $x<isa>, but now is defined
to have the same ISA as elf architecture attribute. Once used .option arch
}
else if (strcmp (name, "norvc") == 0)
{
- riscv_update_subset (&riscv_rps_as, "-c,-zca,-zcd,-zcf,-zcb,-zce,-zcmp,"
- "-zcmt,-zcmop,-zclsd");
+ riscv_update_subset_norvc (&riscv_rps_as);
riscv_arch_str (xlen, riscv_rps_as.subset_list, true/* update */);
riscv_set_rvc (false);
}
It's not expected that options are changed in this manner during regular use,
but there are a handful of esoteric cases like the one above where users need
to disable particular features of the assembler for particular code sequences.
-However, it's also useful to enable/disable the extensions for some specific
-code regions by @samp{.option arch, +-}. This is very common in the ifunc
-libraries. We can support functions which are implemented by different
-extensions in the same library, but these should not affect any file-level
-settings, like the elf architecture attribute. The complete list of option
-arguments is shown below:
+However, it's also useful to enable and reset the extensions for some specific
+code regions by @samp{.option arch, +ext} and @samp{.option arch, ISA}. Or
+use @samp{.option push} and @samp{.option pop} at the beginning and end of the
+code, so that we can indirectly turn on and off extensions in this range. This
+is very common in the ifunc libraries. We can support functions which are
+implemented by different extensions in the same library, but these should not
+affect any file-level settings, like the elf architecture attribute. The
+complete list of option arguments is shown below:
@table @code
@item push
Enables or disables the CSR checking.
@item arch, @var{+extension[version]} [,...,@var{+extension_n[version_n]}]
-@itemx arch, @var{-extension} [,...,@var{-extension_n}]
@itemx arch, @var{ISA}
-Enables or disables the extensions for specific code region. For example,
-@samp{.option arch, +m2p0} means add m extension with version 2.0, and
-@samp{.option arch, -f, -d} means remove extensions, f and d, from the
-architecture string. Note that, @samp{.option arch, +c, -c} have the same
-behavior as @samp{.option rvc, norvc}. However, they are also undesirable
-sometimes. Besides, @samp{.option arch, -i} is illegal, since we cannot
-remove the base i extension anytime. If you want to reset the whole ISA
-string, you can also use @samp{.option arch, rv32imac} to overwrite the
-previous settings.
+Enable or reset the extensions for specific code region. For example,
+@samp{.option arch, +m2p0} means add m extension with version 2.0.
+@samp{.option arch, rv32imac} means reset and overwrite the previous settings
+by rv32imac.
@end table
@cindex INSN directives
- .option arch, -c
+ .option norvc
.align 2
.align 1
.global _start
_start:
.option push
- .option arch, -c
+ .option norvc
# _start + 0x00
auipc t0, 0
addiw t1, t0, 0x18
target:
.option push
- .option arch, -c
+ .option norvc
## Use hi_addr
# Load
lui t0, 0xfffff
c.addi t6, -20
.ifdef rv64
.option push
- .option arch, -c
+ .option norvc
# ADDIW (not compressed)
lui s6, 0xffff8
addiw s7, s6, -24
target:
- .option arch, -c
+ .option norvc
zext.b a0, a0
zext.h a0, a0
sext.b a0, a0
.attribute arch, "rv32ic"
-.option arch, -c
+.option norvc
.insn 4, 0x00000013
$x:
.insn 2, 0x0001
.globl funcB
funcB:
addi a0, zero, 2 # rv32ic, need to be added since start of section
-.option arch, -c
+.option norvc
j funcB # rv32i
.option pop
.option arch, +c
addi a0, zero, 1 # $xrv32ic
.byte 1 # $d
-.option arch, -c
+.option norvc
.align 3 # odd alignment, $x replaced by $d + $x
addi a0, zero, 2 # $xrv32i
.option pop
.align 2 # $xrv32ic, .align and .fill are in the different frag, so neither be removed,
# but will be removed in riscv_check_mapping_symbols
.fill 1, 0, 0 # $d with zero size, removed in make_mapping_symbol when adding $xrv32ic
-.option arch, -c
+.option norvc
addi a0, zero, 1 # $xrv32i
addi a0, zero, 2
.option pop
.section .text.last.section, "ax"
.option push
.option norelax
-.option arch, -c
+.option norvc
addi a0, zero, 1 # $xrv32i
.word 1 # $d
.align 2 # zero section padding, $x at the end of section, removed in riscv_check_mapping_symbols
.option arch, rv32ic
.balign 4 # $xrv32ic, add at the start of section
addi a0, zero, 1 # $x, won't added
-.option arch, -c
+.option norvc
.align 3 # $x, won't added
addi a0, zero, 2 # $xrv32i
.option pop
.*Assembler messages:
.*Error: m2p0: ISA string must begin with rv32, rv64 or Profiles
-.*Error: cannot \+ or \- base extension `i' in .option arch `\-i'
-.*Error: cannot \+ or \- base extension `e' in .option arch `\+e'
-.*Error: cannot \+ or \- base extension `g' in .option arch `\-g'
+.*Error: deprecated \- extension `i' in .option arch `\-i'
+.*Error: cannot \+ base extension `e' in .option arch `\+e'
+.*Error: deprecated \- extension `g' in .option arch `\-g'
+.*Error: deprecated \- extension `c' in .option arch `\-c'
.*Error: unknown ISA extension `zsubset' in .option arch `\+zsubset2p0'
.*Error: unknown ISA extension `f2p0_d' in .option arch `\+f2p0_d2p0'
.*Error: unknown ISA extension `' in .option arch `\+'
.option arch, -i
.option arch, +e
.option arch, -g
+.option arch, -c
.option arch, +zsubset2p0
.option arch, +f2p0_d2p0
.option arch, +
.attribute arch, "rv64ic" # file-level, rv64ic
add a0, a0, a1
.option push
-.option arch, +d2p0, -c, +xvendor1p0
+.option arch, +d2p0, +xvendor1p0
+.option norvc
add a0, a0, a1 # func-level, rv64i_d2p0_xvendor1p0
frcsr a0
.option pop
- .option arch, -c
+ .option norvc
slli a0, a0, 0
slli a0, a0, 31
slli a0, a0, 32
- .option arch, -c
+ .option norvc
slli a0, a0, 0
slli a0, a0, 31
slli a0, a0, 32