x86: Fix incorrect scope of setting `shared_per_thread` [BZ# 30745]

The:

```
    if (shared_per_thread > 0 && threads > 0)
      shared_per_thread /= threads;
```

Code was accidentally moved to inside the else scope.  This doesn't
match how it was previously (before af992e7abd).

This patch fixes that by putting the division after the `else` block.

(cherry picked from commit 084fb31bc2c5f95ae0b9e6df4d3cf0ff43471ede)

diff --git a/sysdeps/x86/cacheinfo.c b/sysdeps/x86/cacheinfo.c
index 0080e8dad5be6fe060e03018c9f16e6678627410..3a3e1115fae873a174270b8a221e33b0902a949e 100644 (file)
--- a/sysdeps/x86/cacheinfo.c
+++ b/sysdeps/x86/cacheinfo.c
@@ -679,18 +679,19 @@ init_cacheinfo (void)
            }
          else
            {
-           intel_bug_no_cache_info:
+intel_bug_no_cache_info:
              /* Assume that all logical threads share the highest cache
                 level.  */
 
-             threads = ((cpu_features->cpuid[COMMON_CPUID_INDEX_1].ebx >> 16)
-                        & 0xff);
-
-             /* Cap usage of highest cache level to the number of supported
-                threads.  */
-             if (shared_per_thread > 0 && threads > 0)
-               shared_per_thread /= threads;
+             threads
+               = ((cpu_features->cpuid[COMMON_CPUID_INDEX_1].ebx
+                   >> 16) & 0xff);
            }
+
+         /* Cap usage of highest cache level to the number of supported
+            threads.  */
+         if (shared_per_thread > 0 && threads > 0)
+           shared_per_thread /= threads;
        }
 
       /* Account for non-inclusive L2 and L3 caches.  */