3.17-stable patches

added patches:
	bitops-fix-shift-overflow-in-genmask-macros.patch

diff --git a/queue-3.17/bitops-fix-shift-overflow-in-genmask-macros.patch b/queue-3.17/bitops-fix-shift-overflow-in-genmask-macros.patch
new file mode 100644 (file)
index 0000000..5129c6f
--- /dev/null
+++ b/queue-3.17/bitops-fix-shift-overflow-in-genmask-macros.patch
@@ -0,0 +1,52 @@
+From 00b4d9a14125f1e51874def2b9de6092e007412d Mon Sep 17 00:00:00 2001
+From: Maxime COQUELIN <maxime.coquelin@st.com>
+Date: Thu, 6 Nov 2014 10:54:19 +0100
+Subject: bitops: Fix shift overflow in GENMASK macros
+
+From: Maxime COQUELIN <maxime.coquelin@st.com>
+
+commit 00b4d9a14125f1e51874def2b9de6092e007412d upstream.
+
+On some 32 bits architectures, including x86, GENMASK(31, 0) returns 0
+instead of the expected ~0UL.
+
+This is the same on some 64 bits architectures with GENMASK_ULL(63, 0).
+
+This is due to an overflow in the shift operand, 1 << 32 for GENMASK,
+1 << 64 for GENMASK_ULL.
+
+Reported-by: Eric Paire <eric.paire@st.com>
+Suggested-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
+Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
+Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
+Cc: linux@rasmusvillemoes.dk
+Cc: gong.chen@linux.intel.com
+Cc: John Sullivan <jsrhbz@kanargh.force9.co.uk>
+Cc: Linus Torvalds <torvalds@linux-foundation.org>
+Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
+Cc: Theodore Ts'o <tytso@mit.edu>
+Fixes: 10ef6b0dffe4 ("bitops: Introduce a more generic BITMASK macro")
+Link: http://lkml.kernel.org/r/1415267659-10563-1-git-send-email-maxime.coquelin@st.com
+Signed-off-by: Ingo Molnar <mingo@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/linux/bitops.h |    7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/include/linux/bitops.h
++++ b/include/linux/bitops.h
+@@ -18,8 +18,11 @@
+  * position @h. For example
+  * GENMASK_ULL(39, 21) gives us the 64bit vector 0x000000ffffe00000.
+  */
+-#define GENMASK(h, l)         (((U32_C(1) << ((h) - (l) + 1)) - 1) << (l))
+-#define GENMASK_ULL(h, l)     (((U64_C(1) << ((h) - (l) + 1)) - 1) << (l))
++#define GENMASK(h, l) \
++      (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
++
++#define GENMASK_ULL(h, l) \
++      (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
+ 
+ extern unsigned int __sw_hweight8(unsigned int w);
+ extern unsigned int __sw_hweight16(unsigned int w);

diff --git a/queue-3.17/series b/queue-3.17/series
index 821fa3667d2b68af1d28735239574ee4336d0910..6627039f17fd2d02f6cd77fd8c5702790d24ae2d 100644 (file)
--- a/queue-3.17/series
+++ b/queue-3.17/series
@@ -112,3 +112,4 @@ drm-i915-ignore-surflive-and-flip-counter-when-the-gpu-gets-reset.patch
 drm-radeon-report-disconnected-for-lvds-edp-with-px-if-ddc-fails.patch
 gpu-radeon-set-flag-to-indicate-broken-64-bit-msi.patch
 drm-radeon-initialize-sadb-to-null-in-the-audio-code.patch
+bitops-fix-shift-overflow-in-genmask-macros.patch