Comment only changes - misc refs to ppc32 changed to ppc.

git-svn-id: svn://svn.valgrind.org/vex/trunk@1511

diff --git a/VEX/priv/guest-generic/bb_to_IR.h b/VEX/priv/guest-generic/bb_to_IR.h
index 571a232726d4a57e7efb2d7af50461e321701025..f30af3de3fe9b5ea7a086f428935432c336781e9 100644 (file)
--- a/VEX/priv/guest-generic/bb_to_IR.h
+++ b/VEX/priv/guest-generic/bb_to_IR.h
@@ -50,7 +50,7 @@
 
 /* This defines stuff needed by the guest insn disassemblers.
    It's a bit circular; is imported by
-   - the guest-specific toIR.c files (guest-{x86,amd64,ppc32,arm}/toIR.c)
+   - the guest-specific toIR.c files (guest-{x86,amd64,ppc,arm}/toIR.c)
    - the generic disassembly driver (bb_to_IR.c)
    - vex_main.c
 */

diff --git a/VEX/priv/guest-ppc/ghelpers.c b/VEX/priv/guest-ppc/ghelpers.c
index 0aa26dd34c33c5025ab34cb660281138625e22a9..924b263527a0e745428599befe96320562e0731f 100644 (file)
--- a/VEX/priv/guest-ppc/ghelpers.c
+++ b/VEX/priv/guest-ppc/ghelpers.c
@@ -604,7 +604,7 @@ void LibVEX_GuestPPC64_initialise ( /*OUT*/VexGuestPPC64State* vex_state )
 
 
 /*-----------------------------------------------------------*/
-/*--- Describing the ppc32 guest state, for the benefit   ---*/
+/*--- Describing the ppc guest state, for the benefit     ---*/
 /*--- of iropt and instrumenters.                         ---*/
 /*-----------------------------------------------------------*/
 
@@ -614,7 +614,7 @@ void LibVEX_GuestPPC64_initialise ( /*OUT*/VexGuestPPC64State* vex_state )
 
    By default we enforce precise exns for guest R1 (stack pointer),
    CIA (current insn address) and LR (link register).  These are the
-   minimum needed to extract correct stack backtraces from ppc32
+   minimum needed to extract correct stack backtraces from ppc
    code. [[NB: not sure if keeping LR up to date is actually
    necessary.]]
 */

diff --git a/VEX/priv/guest-ppc/toIR.c b/VEX/priv/guest-ppc/toIR.c
index de79e421ab2d17625bc4ed8362dd7af32f30cb4a..486b08806bcdaf49098436192b5dca10f768c547 100644 (file)
--- a/VEX/priv/guest-ppc/toIR.c
+++ b/VEX/priv/guest-ppc/toIR.c
@@ -1677,7 +1677,7 @@ static void set_XER_CA_32 ( UInt op, IRExpr* res,
    /* Incoming oldca is assumed to hold the values 0 or 1 only.  This
       seems reasonable given that it's always generated by
       getXER_CA32(), which masks it accordingly.  In any case it being
-      0 or 1 is an invariant of the ppc32 guest state representation;
+      0 or 1 is an invariant of the ppc guest state representation;
       if it has any other value, that invariant has been violated. */
 
    switch (op) {
@@ -1795,7 +1795,7 @@ static void set_XER_CA_64 ( UInt op, IRExpr* res,
    /* Incoming oldca is assumed to hold the values 0 or 1 only.  This
       seems reasonable given that it's always generated by
       getXER_CA32(), which masks it accordingly.  In any case it being
-      0 or 1 is an invariant of the ppc32 guest state representation;
+      0 or 1 is an invariant of the ppc guest state representation;
       if it has any other value, that invariant has been violated. */
 
    switch (op) {

diff --git a/VEX/priv/host-ppc/hdefs.c b/VEX/priv/host-ppc/hdefs.c
index c0da8c6f68b31482835f4c62efde5b3d75fa02ae..1a83d2358398750aab61383da958710a2851c07d 100644 (file)
--- a/VEX/priv/host-ppc/hdefs.c
+++ b/VEX/priv/host-ppc/hdefs.c
@@ -2109,7 +2109,7 @@ Bool isMove_PPCInstr ( PPCInstr* i, HReg* src, HReg* dst )
 }
 
 
-/* Generate ppc32 spill/reload instructions under the direction of the
+/* Generate ppc spill/reload instructions under the direction of the
    register allocator.  Note it's critical these don't write the
    condition codes. */
 PPCInstr* genSpill_PPC ( HReg rreg, UShort offsetB, Bool mode64 )
@@ -2161,7 +2161,7 @@ PPCInstr* genReload_PPC ( HReg rreg, UShort offsetB, Bool mode64 )
 }
 
 
-/* --------- The ppc32 assembler (bleh.) --------- */
+/* --------- The ppc assembler (bleh.) --------- */
 
 static UInt iregNo ( HReg r, Bool mode64 )
 {
@@ -2203,7 +2203,7 @@ static UChar* emit32 ( UChar* p, UInt w32 )
    return p;
 }
 
-/* The following mkForm[...] functions refer to PPC32 instruction forms
+/* The following mkForm[...] functions refer to ppc instruction forms
    as per PPC32 p576
  */
 
@@ -2530,7 +2530,7 @@ static UChar* mkFormVA ( UChar* p, UInt opc1, UInt r1, UInt r2,
    Note that buf is not the insn's final place, and therefore it is
    imperative to emit position-independent code. 
 
-   Note, dispatch should always be NULL since ppc32/ppc64 backends
+   Note, dispatch should always be NULL since ppc32/64 backends
    use a call-return scheme to get from the dispatcher to generated
    code and back.
 */

diff --git a/VEX/pub/libvex_ir.h b/VEX/pub/libvex_ir.h
index 445a44c3586b2a3c9948b5ed3dc762d771346e0e..e9cf28e2aa691dd78487269fd6d35072d381f9d7 100644 (file)
--- a/VEX/pub/libvex_ir.h
+++ b/VEX/pub/libvex_ir.h
@@ -472,7 +472,7 @@ typedef
       /* binary */
       Iop_Add32Fx4, Iop_Sub32Fx4, Iop_Mul32Fx4, Iop_Div32Fx4, 
       Iop_Max32Fx4, Iop_Min32Fx4,
-      /* Note: For the following compares, the ppc32 front-end assumes a
+      /* Note: For the following compares, the ppc front-end assumes a
          nan in a lane of either argument returns zero for that lane. */
       Iop_CmpEQ32Fx4, Iop_CmpLT32Fx4, Iop_CmpLE32Fx4, Iop_CmpUN32Fx4, 
       Iop_CmpGT32Fx4, Iop_CmpGE32Fx4,
@@ -857,7 +857,7 @@ typedef
       Ijk_TInval,         /* Invalidate translations before continuing. */
       /* Unfortunately, various guest-dependent syscall kinds.  They
         all mean: do a syscall before continuing. */
-      Ijk_Sys_syscall,    /* amd64 'syscall', ppc32 'sc' */
+      Ijk_Sys_syscall,    /* amd64 'syscall', ppc 'sc' */
       Ijk_Sys_int32,      /* amd64/x86 'int $0x20' */
       Ijk_Sys_int128,     /* amd64/x86 'int $0x80' */
       Ijk_Sys_sysenter    /* x86 'sysenter'.  guest_EIP becomes