gcc/

	* config/mips/mips.c (vr4130_align_insns): Don't simulate
	ghost instructions.  Assert that the required instructions exist.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@190716 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8c1174e33aa7dd88eafb1a17728823da7bfb5b25..82c7a3580f923f46ee4cab702339ba0314291a77 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-08-27  Richard Sandiford  <rdsandiford@googlemail.com>
+
+       * config/mips/mips.c (vr4130_align_insns): Don't simulate
+       ghost instructions.  Assert that the required instructions exist.
+
 2012-08-26  Richard Sandiford  <rdsandiford@googlemail.com>
 
        * config/mips/mips.h (AVOID_CCMODE_COPIES): Update rationale for

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 64e98c3fb916d8c6244710a6ea5ec2f9958bb5d7..b20e4ed36369bc65e5ddc8c00e0daed08612a68a 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -15145,7 +15145,8 @@ vr4130_align_insns (void)
         the fly to avoid a separate instruction walk.  */
       vr4130_avoid_branch_rt_conflict (insn);
 
-      if (USEFUL_INSN_P (insn))
+      length = get_attr_length (insn);
+      if (length > 0 && USEFUL_INSN_P (insn))
        FOR_EACH_SUBINSN (subinsn, insn)
          {
            mips_sim_wait_insn (&state, subinsn);
@@ -15180,6 +15181,7 @@ vr4130_align_insns (void)
                       issuing at the same time as the branch.  We therefore
                       insert a nop before the branch in order to align its
                       delay slot.  */
+                   gcc_assert (last2);
                    emit_insn_after (gen_nop (), last2);
                    aligned_p = false;
                  }
@@ -15188,6 +15190,7 @@ vr4130_align_insns (void)
                    /* SUBINSN is the delay slot of INSN, but INSN is
                       currently unaligned.  Insert a nop between
                       LAST and INSN to align it.  */
+                   gcc_assert (last);
                    emit_insn_after (gen_nop (), last);
                    aligned_p = true;
                  }