drm/amdgpu/gfx11: clean up kcq reset code

Replace kcq queue reset with existing function amdgpu_mes_reset_legacy_queue.

Signed-off-by: Jesse Zhang <jesse.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index f72ca5e4a44b95c4735a28fb74b02c89624de807..37c552e06e5b52b9846d6189a056668a51ec5624 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -6650,30 +6650,14 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring, unsigned int vmid)
 static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring, unsigned int vmid)
 {
        struct amdgpu_device *adev = ring->adev;
-       int i, r = 0;
+       int r = 0;
 
        if (amdgpu_sriov_vf(adev))
                return -EINVAL;
 
-       amdgpu_gfx_rlc_enter_safe_mode(adev, 0);
-       mutex_lock(&adev->srbm_mutex);
-       soc21_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
-       WREG32_SOC15(GC, 0, regCP_HQD_DEQUEUE_REQUEST, 0x2);
-       WREG32_SOC15(GC, 0, regSPI_COMPUTE_QUEUE_RESET, 0x1);
-
-       /* make sure dequeue is complete*/
-       for (i = 0; i < adev->usec_timeout; i++) {
-               if (!(RREG32_SOC15(GC, 0, regCP_HQD_ACTIVE) & 1))
-                       break;
-               udelay(1);
-       }
-       if (i >= adev->usec_timeout)
-               r = -ETIMEDOUT;
-       soc21_grbm_select(adev, 0, 0, 0, 0);
-       mutex_unlock(&adev->srbm_mutex);
-       amdgpu_gfx_rlc_exit_safe_mode(adev, 0);
+       r = amdgpu_mes_reset_legacy_queue(ring->adev, ring, vmid, true);
        if (r) {
-               dev_err(adev->dev, "fail to wait on hqd deactivate\n");
+               dev_err(adev->dev, "reset via MMIO failed %d\n", r);
                return r;
        }