--- /dev/null
+From 45e2b5f640b3766da3eda48f6c35f088155c06f3 Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Fri, 23 Nov 2012 18:16:34 +0100
+Subject: drm/i915: force restore on lid open
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit 45e2b5f640b3766da3eda48f6c35f088155c06f3 upstream.
+
+There seem to be indeed some awkwards machines around, mostly those
+without OpRegion support, where the firmware changes the display hw
+state behind our backs when closing the lid.
+
+This force-restore logic has been originally introduced in
+
+commit c1c7af60892070e4b82ad63bbfb95ae745056de0
+Author: Jesse Barnes <jbarnes@virtuousgeek.org>
+Date: Thu Sep 10 15:28:03 2009 -0700
+
+ drm/i915: force mode set at lid open time
+
+but after the modeset-rework we've disabled it in the vain hope that
+it's no longer required:
+
+commit 3b7a89fce3e3dc96b549d6d829387b4439044d0d
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Mon Sep 17 22:27:21 2012 +0200
+
+ drm/i915: fix OOPS in lid_notify
+
+Alas, no.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54677
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57434
+Tested-by: Krzysztof Mazur <krzysiek@podlesie.net>
+Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: CAI Qian <caiqian@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_drv.c | 2 +-
+ drivers/gpu/drm/i915/i915_drv.h | 3 ++-
+ drivers/gpu/drm/i915/intel_display.c | 15 ++++++++++++---
+ drivers/gpu/drm/i915/intel_lvds.c | 2 +-
+ 4 files changed, 16 insertions(+), 6 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_drv.c
++++ b/drivers/gpu/drm/i915/i915_drv.c
+@@ -552,7 +552,7 @@ static int i915_drm_thaw(struct drm_devi
+ mutex_unlock(&dev->struct_mutex);
+
+ intel_modeset_init_hw(dev);
+- intel_modeset_setup_hw_state(dev);
++ intel_modeset_setup_hw_state(dev, false);
+ drm_mode_config_reset(dev);
+ drm_irq_install(dev);
+ }
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -1595,7 +1595,8 @@ extern void intel_modeset_init(struct dr
+ extern void intel_modeset_gem_init(struct drm_device *dev);
+ extern void intel_modeset_cleanup(struct drm_device *dev);
+ extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state);
+-extern void intel_modeset_setup_hw_state(struct drm_device *dev);
++extern void intel_modeset_setup_hw_state(struct drm_device *dev,
++ bool force_restore);
+ extern bool intel_fbc_enabled(struct drm_device *dev);
+ extern void intel_disable_fbc(struct drm_device *dev);
+ extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8250,7 +8250,8 @@ static void intel_sanitize_encoder(struc
+
+ /* Scan out the current hw modeset state, sanitizes it and maps it into the drm
+ * and i915 state tracking structures. */
+-void intel_modeset_setup_hw_state(struct drm_device *dev)
++void intel_modeset_setup_hw_state(struct drm_device *dev,
++ bool force_restore)
+ {
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ enum pipe pipe;
+@@ -8321,7 +8322,15 @@ void intel_modeset_setup_hw_state(struct
+ intel_sanitize_crtc(crtc);
+ }
+
+- intel_modeset_update_staged_output_state(dev);
++ if (force_restore) {
++ for_each_pipe(pipe) {
++ crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
++ intel_set_mode(&crtc->base, &crtc->base.mode,
++ crtc->base.x, crtc->base.y, crtc->base.fb);
++ }
++ } else {
++ intel_modeset_update_staged_output_state(dev);
++ }
+
+ intel_modeset_check_state(dev);
+ }
+@@ -8332,7 +8341,7 @@ void intel_modeset_gem_init(struct drm_d
+
+ intel_setup_overlay(dev);
+
+- intel_modeset_setup_hw_state(dev);
++ intel_modeset_setup_hw_state(dev, false);
+ }
+
+ void intel_modeset_cleanup(struct drm_device *dev)
+--- a/drivers/gpu/drm/i915/intel_lvds.c
++++ b/drivers/gpu/drm/i915/intel_lvds.c
+@@ -526,7 +526,7 @@ static int intel_lid_notify(struct notif
+ dev_priv->modeset_on_lid = 0;
+
+ mutex_lock(&dev->mode_config.mutex);
+- intel_modeset_check_state(dev);
++ intel_modeset_setup_hw_state(dev, true);
+ mutex_unlock(&dev->mode_config.mutex);
+
+ return NOTIFY_OK;
--- /dev/null
+From 3490ea5de6ac4af309c3df8a26a5cca61306334c Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Mon, 7 Jan 2013 10:11:40 +0000
+Subject: drm/i915: Treat crtc->mode.clock == 0 as disabled
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 3490ea5de6ac4af309c3df8a26a5cca61306334c upstream.
+
+Prevent a divide-by-zero by consistently treating an 'active' CRTC
+without a mode set as actually disabled.
+
+This looks to have been first introduced with
+
+commit 24929352481f085c5f85d4d4cbc919ddf106d381
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Mon Jul 2 20:28:59 2012 +0200
+
+ drm/i915: read out the modeset hw state at load and resume time
+
+but then combined with
+
+commit b0a2658acb5bf9ca86b4aab011b7106de3af0add
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Tue Dec 18 09:37:54 2012 +0100
+
+ drm/i915: don't disable disconnected outputs
+
+it finally started oopsing.
+
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Reported-and-tested-by: Alexey Zaytsev <alexey.zaytsev@gmail.com>
+Tested-by: Sedat Dilek <sedat.dilek@gmail.com>
+Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
+Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_pm.c | 23 +++++++++++++++--------
+ 1 file changed, 15 insertions(+), 8 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_pm.c
++++ b/drivers/gpu/drm/i915/intel_pm.c
+@@ -44,6 +44,14 @@
+ * i915.i915_enable_fbc parameter
+ */
+
++static bool intel_crtc_active(struct drm_crtc *crtc)
++{
++ /* Be paranoid as we can arrive here with only partial
++ * state retrieved from the hardware during setup.
++ */
++ return to_intel_crtc(crtc)->active && crtc->fb && crtc->mode.clock;
++}
++
+ static void i8xx_disable_fbc(struct drm_device *dev)
+ {
+ struct drm_i915_private *dev_priv = dev->dev_private;
+@@ -405,9 +413,8 @@ void intel_update_fbc(struct drm_device
+ * - going to an unsupported config (interlace, pixel multiply, etc.)
+ */
+ list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
+- if (tmp_crtc->enabled &&
+- !to_intel_crtc(tmp_crtc)->primary_disabled &&
+- tmp_crtc->fb) {
++ if (intel_crtc_active(tmp_crtc) &&
++ !to_intel_crtc(tmp_crtc)->primary_disabled) {
+ if (crtc) {
+ DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
+ dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES;
+@@ -992,7 +999,7 @@ static struct drm_crtc *single_enabled_c
+ struct drm_crtc *crtc, *enabled = NULL;
+
+ list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
+- if (crtc->enabled && crtc->fb) {
++ if (intel_crtc_active(crtc)) {
+ if (enabled)
+ return NULL;
+ enabled = crtc;
+@@ -1086,7 +1093,7 @@ static bool g4x_compute_wm0(struct drm_d
+ int entries, tlb_miss;
+
+ crtc = intel_get_crtc_for_plane(dev, plane);
+- if (crtc->fb == NULL || !crtc->enabled) {
++ if (!intel_crtc_active(crtc)) {
+ *cursor_wm = cursor->guard_size;
+ *plane_wm = display->guard_size;
+ return false;
+@@ -1215,7 +1222,7 @@ static bool vlv_compute_drain_latency(st
+ int entries;
+
+ crtc = intel_get_crtc_for_plane(dev, plane);
+- if (crtc->fb == NULL || !crtc->enabled)
++ if (!intel_crtc_active(crtc))
+ return false;
+
+ clock = crtc->mode.clock; /* VESA DOT Clock */
+@@ -1478,7 +1485,7 @@ static void i9xx_update_wm(struct drm_de
+
+ fifo_size = dev_priv->display.get_fifo_size(dev, 1);
+ crtc = intel_get_crtc_for_plane(dev, 1);
+- if (crtc->enabled && crtc->fb) {
++ if (intel_crtc_active(crtc)) {
+ planeb_wm = intel_calculate_wm(crtc->mode.clock,
+ wm_info, fifo_size,
+ crtc->fb->bits_per_pixel / 8,
+@@ -1923,7 +1930,7 @@ sandybridge_compute_sprite_wm(struct drm
+ int entries, tlb_miss;
+
+ crtc = intel_get_crtc_for_plane(dev, plane);
+- if (crtc->fb == NULL || !crtc->enabled) {
++ if (!intel_crtc_active(crtc)) {
+ *sprite_wm = display->guard_size;
+ return false;
+ }
--- /dev/null
+From 0fde901f1ddd2ce0e380a6444f1fb7ca555859e9 Mon Sep 17 00:00:00 2001
+From: Krzysztof Mazur <krzysiek@podlesie.net>
+Date: Wed, 19 Dec 2012 11:03:41 +0100
+Subject: i915: ensure that VGA plane is disabled
+
+From: Krzysztof Mazur <krzysiek@podlesie.net>
+
+commit 0fde901f1ddd2ce0e380a6444f1fb7ca555859e9 upstream.
+
+Some broken systems (like HP nc6120) in some cases, usually after LID
+close/open, enable VGA plane, making display unusable (black screen on LVDS,
+some strange mode on VGA output). We used to disable VGA plane only once at
+startup. Now we also check, if VGA plane is still disabled while changing
+mode, and fix that if something changed it.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57434
+Signed-off-by: Krzysztof Mazur <krzysiek@podlesie.net>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_display.c | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_display.c
++++ b/drivers/gpu/drm/i915/intel_display.c
+@@ -8248,6 +8248,23 @@ static void intel_sanitize_encoder(struc
+ * the crtc fixup. */
+ }
+
++static void i915_redisable_vga(struct drm_device *dev)
++{
++ struct drm_i915_private *dev_priv = dev->dev_private;
++ u32 vga_reg;
++
++ if (HAS_PCH_SPLIT(dev))
++ vga_reg = CPU_VGACNTRL;
++ else
++ vga_reg = VGACNTRL;
++
++ if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
++ DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
++ I915_WRITE(vga_reg, VGA_DISP_DISABLE);
++ POSTING_READ(vga_reg);
++ }
++}
++
+ /* Scan out the current hw modeset state, sanitizes it and maps it into the drm
+ * and i915 state tracking structures. */
+ void intel_modeset_setup_hw_state(struct drm_device *dev,
+@@ -8328,6 +8345,8 @@ void intel_modeset_setup_hw_state(struct
+ intel_set_mode(&crtc->base, &crtc->base.mode,
+ crtc->base.x, crtc->base.y, crtc->base.fb);
+ }
++
++ i915_redisable_vga(dev);
+ } else {
+ intel_modeset_update_staged_output_state(dev);
+ }
ceph-fix-__ceph_do_pending_vmtruncate.patch
ceph-call-handle_cap_grant-for-cap-import-message.patch
libceph-unlock-unprocessed-pages-in-start_read-error-path.patch
+drm-i915-force-restore-on-lid-open.patch
+i915-ensure-that-vga-plane-is-disabled.patch
+drm-i915-treat-crtc-mode.clock-0-as-disabled.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
