]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: allwinner: t527: orangepi-4a: hook up external 32k crystal
authorChen-Yu Tsai <wens@csie.org>
Sat, 13 Sep 2025 10:24:50 +0000 (18:24 +0800)
committerChen-Yu Tsai <wens@csie.org>
Sun, 14 Sep 2025 16:04:10 +0000 (00:04 +0800)
When the board was added, its external 32.768 KHz crystal was described
but not hooked up correctly. This meant the device had to fall back to
the SoC's internal oscillator or divide a 32 KHz clock from the main
oscillator, neither of which are accurate for the RTC. As a result the
RTC clock will drift badly.

Hook the crystal up to the RTC block and request the correct clock rate.

Fixes: de713ccb9934 ("arm64: dts: allwinner: t527: Add OrangePi 4A board")
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250913102450.3935943-3-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts

index d07bb9193b4382080d41a21b3491e607674002e6..b5483bd7b8d5d15368b102be3cc25ab17534249e 100644 (file)
        vcc-pm-supply = <&reg_bldo2>;
 };
 
+&rtc {
+       clocks = <&r_ccu CLK_BUS_R_RTC>, <&osc24M>,
+                <&r_ccu CLK_R_AHB>, <&ext_osc32k>;
+       clock-names = "bus", "hosc", "ahb", "ext-osc32k";
+       assigned-clocks = <&rtc CLK_OSC32K>;
+       assigned-clock-rates = <32768>;
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pb_pins>;