]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
video: rockchip: dw_mipi_dsi: Fix GRF access
authorOndrej Jirman <megi@xff.cz>
Mon, 22 May 2023 21:47:08 +0000 (23:47 +0200)
committerAnatolij Gustschin <agust@denx.de>
Fri, 14 Jul 2023 16:30:58 +0000 (18:30 +0200)
Use proper register base and access method to access GRF registers.
GRF registers start at a completely different base, and need special
access method, that sets the change mask in the 16 MSBs.

Signed-off-by: Ondrej Jirman <megi@xff.cz>
drivers/video/rockchip/dw_mipi_dsi_rockchip.c

index fd885ac8ccb69c5ea1d0ab62f535a6a4439a659b..117c3db21ac163f3f152fe4bf12293bd58bfd660 100644 (file)
@@ -18,6 +18,7 @@
 #include <panel.h>
 #include <phy-mipi-dphy.h>
 #include <reset.h>
+#include <syscon.h>
 #include <video_bridge.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
@@ -30,6 +31,9 @@
 #include <dm/device-internal.h>
 #include <linux/bitops.h>
 
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/hardware.h>
+
 #define USEC_PER_SEC   1000000L
 
 /*
@@ -197,6 +201,7 @@ struct dw_rockchip_dsi_priv {
        struct mipi_dsi_device device;
        void __iomem *base;
        struct udevice *panel;
+       void __iomem *grf;
 
        /* Optional external dphy */
        struct phy phy;
@@ -752,16 +757,13 @@ static int dw_mipi_dsi_rockchip_set_bl(struct udevice *dev, int percent)
 static void dw_mipi_dsi_rockchip_config(struct dw_rockchip_dsi_priv *dsi)
 {
        if (dsi->cdata->lanecfg1_grf_reg)
-               dsi_write(dsi, dsi->cdata->lanecfg1_grf_reg,
-                         dsi->cdata->lanecfg1);
+               rk_setreg(dsi->grf + dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1);
 
        if (dsi->cdata->lanecfg2_grf_reg)
-               dsi_write(dsi, dsi->cdata->lanecfg2_grf_reg,
-                         dsi->cdata->lanecfg2);
+               rk_setreg(dsi->grf + dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2);
 
        if (dsi->cdata->enable_grf_reg)
-               dsi_write(dsi, dsi->cdata->enable_grf_reg,
-                         dsi->cdata->enable);
+               rk_setreg(dsi->grf + dsi->cdata->enable_grf_reg, dsi->cdata->enable);
 }
 
 static int dw_mipi_dsi_rockchip_bind(struct udevice *dev)
@@ -794,6 +796,8 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev)
                return -EINVAL;
        }
 
+       priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
        i = 0;
        while (cdata[i].reg) {
                if (cdata[i].reg == (fdt_addr_t)priv->base) {