--- /dev/null
+From c39e8e4354ce4daf23336de5daa28a3b01f00aa6 Mon Sep 17 00:00:00 2001
+From: "Steven A. Falco" <sfalco@harris.com>
+Date: Mon, 22 Apr 2013 09:34:39 +0000
+Subject: i2c: xiic: must always write 16-bit words to TX_FIFO
+
+From: "Steven A. Falco" <sfalco@harris.com>
+
+commit c39e8e4354ce4daf23336de5daa28a3b01f00aa6 upstream.
+
+The TX_FIFO register is 10 bits wide. The lower 8 bits are the data to be
+written, while the upper two bits are flags to indicate stop/start.
+
+The driver apparently attempted to optimize write access, by only writing a
+byte in those cases where the stop/start bits are zero. However, we have
+seen cases where the lower byte is duplicated onto the upper byte by the
+hardware, which causes inadvertent stop/starts.
+
+This patch changes the write access to the transmit FIFO to always be 16 bits
+wide.
+
+Signed off by: Steven A. Falco <sfalco@harris.com>
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/i2c/busses/i2c-xiic.c | 6 ++----
+ 1 file changed, 2 insertions(+), 4 deletions(-)
+
+--- a/drivers/i2c/busses/i2c-xiic.c
++++ b/drivers/i2c/busses/i2c-xiic.c
+@@ -311,10 +311,8 @@ static void xiic_fill_tx_fifo(struct xii
+ /* last message in transfer -> STOP */
+ data |= XIIC_TX_DYN_STOP_MASK;
+ dev_dbg(i2c->adap.dev.parent, "%s TX STOP\n", __func__);
+-
+- xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
+- } else
+- xiic_setreg8(i2c, XIIC_DTR_REG_OFFSET, data);
++ }
++ xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, data);
+ }
+ }
+