]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
x86: Set Prefer_No_VZEROUPPER and add Prefer_AVX2_STRCMP
authorH.J. Lu <hjl.tools@gmail.com>
Fri, 26 Feb 2021 13:36:59 +0000 (05:36 -0800)
committerH.J. Lu <hjl.tools@gmail.com>
Thu, 27 Jan 2022 20:07:11 +0000 (12:07 -0800)
1. Set Prefer_No_VZEROUPPER if RTM is usable to avoid RTM abort triggered
by VZEROUPPER inside a transactionally executing RTM region.
2. Since to compare 2 32-byte strings, 256-bit EVEX strcmp requires 2
loads, 3 VPCMPs and 2 KORDs while AVX2 strcmp requires 1 load, 2 VPCMPEQs,
1 VPMINU and 1 VPMOVMSKB, AVX2 strcmp is faster than EVEX strcmp.  Add
Prefer_AVX2_STRCMP to prefer AVX2 strcmp family functions.

(cherry picked from commit 1da50d4bda07f04135dca39f40e79fc9eabed1f8)

sysdeps/x86/cpu-features.c
sysdeps/x86/cpu-features.h
sysdeps/x86/cpu-tunables.c

index 121f706402d1860b5035d38c1044c27323e59a27..3db490aa8fe49aa033950753ace2ebcd7c31ffeb 100644 (file)
@@ -422,8 +422,24 @@ init_cpu_features (struct cpu_features *cpu_features)
        cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
          |= bit_arch_Prefer_No_VZEROUPPER;
       else
-       cpu_features->feature[index_arch_Prefer_No_AVX512]
-         |= bit_arch_Prefer_No_AVX512;
+       {
+         cpu_features->feature[index_arch_Prefer_No_AVX512]
+           |= bit_arch_Prefer_No_AVX512;
+
+         /* Avoid RTM abort triggered by VZEROUPPER inside a
+            transactionally executing RTM region.  */
+         if (CPU_FEATURES_CPU_P (cpu_features, RTM))
+           cpu_features->feature[index_arch_Prefer_No_VZEROUPPER]
+             |= bit_arch_Prefer_No_VZEROUPPER;
+
+         /* Since to compare 2 32-byte strings, 256-bit EVEX strcmp
+            requires 2 loads, 3 VPCMPs and 2 KORDs while AVX2 strcmp
+            requires 1 load, 2 VPCMPEQs, 1 VPMINU and 1 VPMOVMSKB,
+            AVX2 strcmp is faster than EVEX strcmp.  */
+         if (CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
+           cpu_features->feature[index_arch_Prefer_AVX2_STRCMP]
+             |= bit_arch_Prefer_AVX2_STRCMP;
+       }
     }
   /* This spells out "AuthenticAMD" or "HygonGenuine".  */
   else if ((ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
index 03a9b2a5e9adb7cc43a02438d20963dfe7316090..ca2924bd958240c1206d3e4fc479fae4b78101d7 100644 (file)
@@ -897,6 +897,7 @@ extern const struct cpu_features *__get_cpu_features (void)
 #define bit_arch_Prefer_FSRM                   (1u << 13)
 #define bit_arch_Prefer_No_AVX512              (1u << 14)
 #define bit_arch_MathVec_Prefer_No_AVX512      (1u << 15)
+#define bit_arch_Prefer_AVX2_STRCMP            (1u << 16)
 
 #define index_arch_Fast_Rep_String             FEATURE_INDEX_2
 #define index_arch_Fast_Copy_Backward          FEATURE_INDEX_2
@@ -914,6 +915,7 @@ extern const struct cpu_features *__get_cpu_features (void)
 #define index_arch_Prefer_No_AVX512            FEATURE_INDEX_2
 #define index_arch_MathVec_Prefer_No_AVX512    FEATURE_INDEX_2
 #define index_arch_Prefer_FSRM                 FEATURE_INDEX_2
+#define index_arch_Prefer_AVX2_STRCMP          FEATURE_INDEX_2
 
 /* XCR0 Feature flags.  */
 #define bit_XMM_state          (1u << 1)
index 2cb315111b12bfde2678fd83bc7c93102cf8e764..d4d5e450a60606db785c0dfd1eb355bdf6ffc22f 100644 (file)
@@ -282,6 +282,9 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
              CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features,
                                           Fast_Copy_Backward, disable,
                                           18);
+             CHECK_GLIBC_IFUNC_ARCH_NEED_ARCH_BOTH
+               (n, cpu_features, Prefer_AVX2_STRCMP, AVX2_Usable,
+                disable, 18);
            }
          break;
        case 19: