net/mlx5e: Add 1600Gbps link modes

Introduce support for a 1600Gbps link mode, utilizing 8 lanes at 200Gbps
per lane.

Signed-off-by: Yael Chemla <ychemla@nvidia.com>
Reviewed-by: Shahar Shitrit <shshitrit@nvidia.com>
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1763585297-1243980-3-git-send-email-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
index 727d7a833110f9f6baa84d847851598fee88e4b3..fe67c73849f92f58db59fdafefb31ca1c98ef5e7 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
@@ -261,6 +261,11 @@ void mlx5e_build_ptys2ethtool_map(void)
                                       ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT,
                                       ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT,
                                       ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT);
+       MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8, ext,
+                                      ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT,
+                                      ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT,
+                                      ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT,
+                                      ETHTOOL_LINK_MODE_1600000baseDR8_2_Full_BIT);
 }
 
 static void mlx5e_ethtool_get_speed_arr(bool ext,

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/port.c b/drivers/net/ethernet/mellanox/mlx5/core/port.c
index e4b1dfafb41fda1f0c0b3ce5658c9867f2c931a0..85a9e534f44274e84f0a04f2f266523d581bcd75 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/port.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/port.c
@@ -1108,6 +1108,7 @@ mlx5e_ext_link_info[MLX5E_EXT_LINK_MODES_NUMBER] = {
        [MLX5E_200GAUI_1_200GBASE_CR1_KR1]      = {.speed = 200000, .lanes = 1},
        [MLX5E_400GAUI_2_400GBASE_CR2_KR2]      = {.speed = 400000, .lanes = 2},
        [MLX5E_800GAUI_4_800GBASE_CR4_KR4]      = {.speed = 800000, .lanes = 4},
+       [MLX5E_1600TAUI_8_1600TBASE_CR8_KR8]    = {.speed = 1600000, .lanes = 8},
 };
 
 int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,