- #clock-cells : from common clock binding; shall be set to 1 (multiple clock
outputs).
-- clocks : must be set to the parent's phandle. it's could be output clocks of
+- clocks : must be set to the parent's phandle. it could be output clocks of
a quadsfs or/and a pll or/and clk_sysin (up to 7 clocks)
- clock-output-names : List of strings used to name the clock outputs.
ATL can maintain a clock averages to some desired frequency based on the bws/aws
signals - can compensate the drift between the two ws signal.
-In order to provide the support for ATL and it's output clocks (which can be used
+In order to provide the support for ATL and its output clocks (which can be used
internally within the SoC or external components) two sets of bindings is needed:
Clock tree binding:
Configures bypassing the individual voltage input attenuator. If
set to 1 the attenuator is bypassed if set to 0 the attenuator is
not bypassed. If the property is absent then the attenuator
- retains it's configuration from the bios/bootloader.
+ retains its configuration from the bios/bootloader.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
- interrupts : interrupt specification for the ektf2127 interrupt
- power-gpios : GPIO specification for the pin connected to the
ektf2127's wake input. This needs to be driven high
- to take ektf2127 out of it's low power state
+ to take ektf2127 out of its low power state
For additional optional properties see: touchscreen.txt
rohm,enable-hidden-gpo:
description: |
The BD71815 has undocumented GPO at pin E5. Pin is marked as GND at the
- data-sheet as it's location in the middle of GND pins makes it hard to
+ data-sheet as its location in the middle of GND pins makes it hard to
use on PCB. If your board has managed to use this pin you can enable the
second GPO by defining this property. Dont enable this if you are unsure
about how the E5 pin is connected on your board.
===========================
This binding describes the RCU (reset controller unit) multifunction device,
-where each sub-device has it's own set of registers.
+where each sub-device has its own set of registers.
The RCU register range is used for multiple purposes. Mostly one device
uses one or multiple register exclusively, but for some registers some
"rx_desc": MSGDMA Rx dispatcher descriptor space region
"rx_resp": MSGDMA Rx dispatcher response space region
"s1": SGDMA descriptor memory
-- interrupts: Should contain the TSE interrupts and it's mode.
+- interrupts: Should contain the TSE interrupts and its mode.
- interrupt-names: Should contain the interrupt names
"rx_irq": xDMA Rx dispatcher interrupt
"tx_irq": xDMA Tx dispatcher interrupt
- active_slave : Specifies the slave to use for time stamping,
ethtool and SIOCGMIIPHY
- cpsw-phy-sel : Specifies the phandle to the CPSW phy mode selection
- device. See also cpsw-phy-sel.txt for it's binding.
+ device. See also cpsw-phy-sel.txt for its binding.
Note that in legacy cases cpsw-phy-sel may be
a child device instead of a phandle
(DEPRECATED, use phys property instead).
The mpc5200 pic binding splits hardware IRQ numbers into two levels. The
split reflects the layout of the PIC hardware itself, which groups
interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
-Bestcomm dma engine has it's own set of interrupt sources which are
+Bestcomm dma engine has its own set of interrupt sources which are
cascaded off of peripheral interrupt 0, which the driver interprets as a
fourth group, SDMA.
This binding describes the hardware component responsible for side channel
requests to the always-on subsystem (AOSS), used for certain power management
requests that is not handled by the standard RPMh interface. Each client in the
- SoC has it's own block of message RAM and IRQ for communication with the AOSS.
+ SoC has its own block of message RAM and IRQ for communication with the AOSS.
The protocol used to communicate in the message RAM is known as Qualcomm
Messaging Protocol (QMP)
DA9055 provides Audio CODEC support (I2C only).
-The Audio CODEC device in DA9055 has it's own I2C address which is configurable,
+The Audio CODEC device in DA9055 has its own I2C address which is configurable,
so the device is instantiated separately from the PMIC (MFD) device.
For details on accompanying PMIC I2C device, see the following:
projects / thirdparty / kernel / linux.git / commitdiff
