--- /dev/null
+From 023dfa9602f561952c0e19d74f66614a56d7e57a Mon Sep 17 00:00:00 2001
+From: Simon Rettberg <simon.rettberg@rz.uni-freiburg.de>
+Date: Mon, 26 Apr 2021 16:11:24 +0200
+Subject: drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7
+
+From: Simon Rettberg <simon.rettberg@rz.uni-freiburg.de>
+
+commit 023dfa9602f561952c0e19d74f66614a56d7e57a upstream.
+
+When resetting CACHE_MODE registers, don't enable HiZ Raw Stall
+Optimization on Ivybridge GT1 and Baytrail, as it causes severe glitches
+when rendering any kind of 3D accelerated content.
+This optimization is disabled on these platforms by default according to
+official documentation from 01.org.
+
+Fixes: ef99a60ffd9b ("drm/i915/gt: Clear CACHE_MODE prior to clearing residuals")
+BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/3081
+BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/3404
+BugLink: https://gitlab.freedesktop.org/drm/intel/-/issues/3071
+Reviewed-by: Manuel Bentele <development@manuel-bentele.de>
+Signed-off-by: Simon Rettberg <simon.rettberg@rz.uni-freiburg.de>
+Reviewed-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+[Rodrigo removed invalid Fixes line]
+Link: https://patchwork.freedesktop.org/patch/msgid/20210426161124.2b7fd708@dellnichtsogutkiste
+(cherry picked from commit 929b734ad34b717d6a1b8de97f53bb5616040147)
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/gt/gen7_renderclear.c | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
++++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c
+@@ -397,7 +397,10 @@ static void emit_batch(struct i915_vma *
+ gen7_emit_pipeline_invalidate(&cmds);
+ batch_add(&cmds, MI_LOAD_REGISTER_IMM(2));
+ batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_0_GEN7));
+- batch_add(&cmds, 0xffff0000);
++ batch_add(&cmds, 0xffff0000 |
++ ((IS_IVB_GT1(i915) || IS_VALLEYVIEW(i915)) ?
++ HIZ_RAW_STALL_OPT_DISABLE :
++ 0));
+ batch_add(&cmds, i915_mmio_reg_offset(CACHE_MODE_1));
+ batch_add(&cmds, 0xffff0000 | PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);
+ gen7_emit_pipeline_invalidate(&cmds);
--- /dev/null
+From 4eff124347191d1548eb4e14e20e77513dcbd0fe Mon Sep 17 00:00:00 2001
+From: Mike Rapoport <rppt@linux.ibm.com>
+Date: Sun, 9 May 2021 12:11:02 +0300
+Subject: openrisc: mm/init.c: remove unused memblock_region variable in map_ram()
+
+From: Mike Rapoport <rppt@linux.ibm.com>
+
+commit 4eff124347191d1548eb4e14e20e77513dcbd0fe upstream.
+
+Kernel test robot reports:
+
+cppcheck possible warnings: (new ones prefixed by >>, may not real problems)
+
+>> arch/openrisc/mm/init.c:125:10: warning: Uninitialized variable: region [uninitvar]
+ region->base, region->base + region->size);
+ ^
+
+Replace usage of memblock_region fields with 'start' and 'end' variables
+that are initialized in for_each_mem_range() and remove the declaration of
+region.
+
+Fixes: b10d6bca8720 ("arch, drivers: replace for_each_membock() with for_each_mem_range()")
+Reported-by: kernel test robot <lkp@intel.com>
+Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
+Signed-off-by: Stafford Horne <shorne@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/openrisc/mm/init.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/arch/openrisc/mm/init.c
++++ b/arch/openrisc/mm/init.c
+@@ -75,7 +75,6 @@ static void __init map_ram(void)
+ /* These mark extents of read-only kernel pages...
+ * ...from vmlinux.lds.S
+ */
+- struct memblock_region *region;
+
+ v = PAGE_OFFSET;
+
+@@ -121,7 +120,7 @@ static void __init map_ram(void)
+ }
+
+ printk(KERN_INFO "%s: Memory: 0x%x-0x%x\n", __func__,
+- region->base, region->base + region->size);
++ start, end);
+ }
+ }
+
vt_ioctl-revert-vt_resizex-parameter-handling-removal.patch
vt-fix-character-height-handling-with-vt_resizex.patch
tty-vt-always-invoke-vc-vc_sw-con_resize-callback.patch
+drm-i915-gt-disable-hiz-raw-stall-optimization-on-broken-gen7.patch
+openrisc-mm-init.c-remove-unused-memblock_region-variable-in-map_ram.patch
+x86-xen-swap-nx-determination-and-gdt-setup-on-bsp.patch
--- /dev/null
+From ae897fda4f507e4b239f0bdfd578b3688ca96fb4 Mon Sep 17 00:00:00 2001
+From: Jan Beulich <jbeulich@suse.com>
+Date: Thu, 20 May 2021 13:42:42 +0200
+Subject: x86/Xen: swap NX determination and GDT setup on BSP
+
+From: Jan Beulich <jbeulich@suse.com>
+
+commit ae897fda4f507e4b239f0bdfd578b3688ca96fb4 upstream.
+
+xen_setup_gdt(), via xen_load_gdt_boot(), wants to adjust page tables.
+For this to work when NX is not available, x86_configure_nx() needs to
+be called first.
+
+[jgross] Note that this is a revert of 36104cb9012a82e73 ("x86/xen:
+Delay get_cpu_cap until stack canary is established"), which is possible
+now that we no longer support running as PV guest in 32-bit mode.
+
+Cc: <stable.vger.kernel.org> # 5.9
+Fixes: 36104cb9012a82e73 ("x86/xen: Delay get_cpu_cap until stack canary is established")
+Reported-by: Olaf Hering <olaf@aepfle.de>
+Signed-off-by: Jan Beulich <jbeulich@suse.com>
+Reviewed-by: Juergen Gross <jgross@suse.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+Link: https://lore.kernel.org/r/12a866b0-9e89-59f7-ebeb-a2a6cec0987a@suse.com
+Signed-off-by: Juergen Gross <jgross@suse.com>
+---
+ arch/x86/xen/enlighten_pv.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/x86/xen/enlighten_pv.c
++++ b/arch/x86/xen/enlighten_pv.c
+@@ -1276,16 +1276,16 @@ asmlinkage __visible void __init xen_sta
+ /* Get mfn list */
+ xen_build_dynamic_phys_to_machine();
+
++ /* Work out if we support NX */
++ get_cpu_cap(&boot_cpu_data);
++ x86_configure_nx();
++
+ /*
+ * Set up kernel GDT and segment registers, mainly so that
+ * -fstack-protector code can be executed.
+ */
+ xen_setup_gdt(0);
+
+- /* Work out if we support NX */
+- get_cpu_cap(&boot_cpu_data);
+- x86_configure_nx();
+-
+ /* Determine virtual and physical address sizes */
+ get_cpu_address_sizes(&boot_cpu_data);
+