arm64: dts: renesas: r9a08g046: Add i2c{0..3} device nodes

Add i2c{0..3} device nodes to RZ/G3L ("R9A08G046") SoC DTSI.
As the place holders for i2c0 is removed, add the pincontrol
device nodes to make it functional on the board DTS.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505070206.7932-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
index 19f2c9f29f5cb7073b4883276731285a1428e0f0..323e7d107a19358f0fd7eb033f8457fd656e85b4 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g046.dtsi
@@ -257,10 +257,91 @@
                };
 
                i2c0: i2c@100ae000 {
+                       compatible = "renesas,riic-r9a08g046", "renesas,riic-r9a09g057";
                        reg = <0 0x100ae000 0 0x400>;
+                       interrupts = <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tei", "ri", "ti", "spi", "sti",
+                                         "naki", "ali", "tmoi";
+                       clocks = <&cpg CPG_MOD R9A08G046_I2C0_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A08G046_I2C0_MRST>;
+                       power-domains = <&cpg>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       /* placeholder */
+                       status = "disabled";
+               };
+
+               i2c1: i2c@10090400 {
+                       compatible = "renesas,riic-r9a08g046", "renesas,riic-r9a09g057";
+                       reg = <0 0x10090400 0 0x400>;
+                       interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 336 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 337 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tei", "ri", "ti", "spi", "sti",
+                                         "naki", "ali", "tmoi";
+                       clocks = <&cpg CPG_MOD R9A08G046_I2C1_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A08G046_I2C1_MRST>;
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@10090800 {
+                       compatible = "renesas,riic-r9a08g046", "renesas,riic-r9a09g057";
+                       reg = <0 0x10090800 0 0x400>;
+                       interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 344 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 345 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tei", "ri", "ti", "spi", "sti",
+                                         "naki", "ali", "tmoi";
+                       clocks = <&cpg CPG_MOD R9A08G046_I2C2_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A08G046_I2C2_MRST>;
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@10090c00 {
+                       compatible = "renesas,riic-r9a08g046", "renesas,riic-r9a09g057";
+                       reg = <0 0x10090c00 0 0x400>;
+                       interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 352 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 353 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tei", "ri", "ti", "spi", "sti",
+                                         "naki", "ali", "tmoi";
+                       clocks = <&cpg CPG_MOD R9A08G046_I2C3_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A08G046_I2C3_MRST>;
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
                };
 
                canfd: can@100c0000 {

diff --git a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
index b28e59a6525993dd4ae1ea231752b6ffdcfa5e49..7770de2064d908db603495704ffb3a5edfa18bec 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3l-smarc-som.dtsi
@@ -11,6 +11,7 @@
        aliases {
                ethernet0 = &eth0;
                ethernet1 = &eth1;
+               i2c0 = &i2c0;
        };
 
        memory@48000000 {
@@ -50,6 +51,11 @@
        clock-frequency = <24000000>;
 };
 
+&i2c0 {
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+};
+
 &mdio0 {
        phy0: ethernet-phy@7 {
                compatible = "ethernet-phy-id0022.1640";
@@ -144,6 +150,11 @@
                                 power-source = <1800>;
                };
        };
+
+       i2c0_pins: i2c0 {
+               pinmux = <RZG3L_PORT_PINMUX(L, 2, 4)>, /* RIIC0_SCL */
+                        <RZG3L_PORT_PINMUX(L, 3, 4)>; /* RIIC0_SDA */
+       };
 };
 
 &wdt0 {