dt-bindings: clock: tmpv770x: Add VIIF clocks

Add clock and reset identifiers for the Video Input Interface.
These identifiers support two instances: VIIF0 and VIIF1.

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/include/dt-bindings/clock/toshiba,tmpv770x.h b/include/dt-bindings/clock/toshiba,tmpv770x.h
index 89189c4f6a52df958c8fac59c281393375890e2f..a36c8926668640d4b279eab7b10c7778a20221e0 100644 (file)
--- a/include/dt-bindings/clock/toshiba,tmpv770x.h
+++ b/include/dt-bindings/clock/toshiba,tmpv770x.h
@@ -140,6 +140,9 @@
 #define TMPV770X_CLK_PIREFCLK          124
 #define TMPV770X_CLK_SBUS              125
 #define TMPV770X_CLK_BUSLCK            126
+#define TMPV770X_CLK_VIIFBS1_L2ISP     127
+#define TMPV770X_CLK_VIIFBS1_L1ISP     128
+#define TMPV770X_CLK_VIIFBS1_PROC      129
 
 /* Reset */
 #define TMPV770X_RESET_PIETHER_2P5M    0
@@ -174,5 +177,13 @@
 #define TMPV770X_RESET_PIPCMIF         29
 #define TMPV770X_RESET_PICKMON         30
 #define TMPV770X_RESET_SBUSCLK         31
+#define TMPV770X_RESET_VIIFBS0         32
+#define TMPV770X_RESET_VIIFBS0_APB     33
+#define TMPV770X_RESET_VIIFBS0_L2ISP   34
+#define TMPV770X_RESET_VIIFBS0_L1ISP   35
+#define TMPV770X_RESET_VIIFBS1         36
+#define TMPV770X_RESET_VIIFBS1_APB     37
+#define TMPV770X_RESET_VIIFBS1_L2ISP   38
+#define TMPV770X_RESET_VIIFBS1_L1ISP   39
 
 #endif /*_DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ */

diff --git a/include/dt-bindings/reset/toshiba,tmpv770x.h b/include/dt-bindings/reset/toshiba,tmpv770x.h
index bedfe253fa363726aeed03e3bfb5ef370791168c..9452bef314252fa671b37945b204fba5302b8008 100644 (file)
--- a/include/dt-bindings/reset/toshiba,tmpv770x.h
+++ b/include/dt-bindings/reset/toshiba,tmpv770x.h
@@ -36,5 +36,13 @@
 #define TMPV770X_RESET_PIPCMIF         29
 #define TMPV770X_RESET_PICKMON         30
 #define TMPV770X_RESET_SBUSCLK         31
+#define TMPV770X_RESET_VIIFBS0         32
+#define TMPV770X_RESET_VIIFBS0_APB     33
+#define TMPV770X_RESET_VIIFBS0_L2ISP   34
+#define TMPV770X_RESET_VIIFBS0_L1ISP   35
+#define TMPV770X_RESET_VIIFBS1         36
+#define TMPV770X_RESET_VIIFBS1_APB     37
+#define TMPV770X_RESET_VIIFBS1_L2ISP   38
+#define TMPV770X_RESET_VIIFBS1_L1ISP   39
 
 #endif /*_DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_ */