]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
net/mlx5: Register mlx5e priv to devcom in MPV mode
authorPatrisious Haddad <phaddad@nvidia.com>
Thu, 21 Sep 2023 12:10:28 +0000 (15:10 +0300)
committerLeon Romanovsky <leon@kernel.org>
Mon, 2 Oct 2023 08:21:03 +0000 (11:21 +0300)
If the device is in MPV mode, the ethernet driver would now register
to events from IB driver about core devices affiliation or
de-affiliation.

Use the key provided in said event to connect each mlx5e priv
instance to it's master counterpart, this way the ethernet driver
is now aware of who is his master core device and even more, such
as knowing if partner device has IPsec configured or not.

Signed-off-by: Patrisious Haddad <phaddad@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Link: https://lore.kernel.org/r/279adfa0aa3a1957a339086f2c1739a50b8e4b68.1695296682.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.h
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
drivers/net/ethernet/mellanox/mlx5/core/lib/devcom.h

index 86f2690c5e0156193365b98ef319719b36db7545..44785a2094669949d4c42677831a4af1d48a6493 100644 (file)
@@ -936,6 +936,7 @@ struct mlx5e_priv {
        struct mlx5e_htb          *htb;
        struct mlx5e_mqprio_rl    *mqprio_rl;
        struct dentry             *dfs_root;
+       struct mlx5_devcom_comp_dev *devcom;
 };
 
 struct mlx5e_dev {
index 9e7c42c2f77b294b52d54f4f0dae138b4522814b..06743156ffcaa5794aa73501d46931bcae8f5fa4 100644 (file)
@@ -42,6 +42,8 @@
 #define MLX5E_IPSEC_SADB_RX_BITS 10
 #define MLX5E_IPSEC_ESN_SCOPE_MID 0x80000000L
 
+#define MPV_DEVCOM_MASTER_UP 1
+
 struct aes_gcm_keymat {
        u64   seq_iv;
 
index a2ae791538edb76401f5c4206e679e1ec8c25d99..f8054da590c94c9069d335ba7a19aa70fe31a6f6 100644 (file)
@@ -69,6 +69,7 @@
 #include "en/htb.h"
 #include "qos.h"
 #include "en/trap.h"
+#include "lib/devcom.h"
 
 bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev, u8 page_shift,
                                            enum mlx5e_mpwrq_umr_mode umr_mode)
@@ -178,6 +179,37 @@ static void mlx5e_disable_async_events(struct mlx5e_priv *priv)
        mlx5_notifier_unregister(priv->mdev, &priv->events_nb);
 }
 
+static int mlx5e_devcom_event_mpv(int event, void *my_data, void *event_data)
+{
+       struct mlx5e_priv *slave_priv = my_data;
+
+       mlx5_devcom_comp_set_ready(slave_priv->devcom, true);
+
+       return 0;
+}
+
+static int mlx5e_devcom_init_mpv(struct mlx5e_priv *priv, u64 *data)
+{
+       priv->devcom = mlx5_devcom_register_component(priv->mdev->priv.devc,
+                                                     MLX5_DEVCOM_MPV,
+                                                     *data,
+                                                     mlx5e_devcom_event_mpv,
+                                                     priv);
+       if (IS_ERR_OR_NULL(priv->devcom))
+               return -EOPNOTSUPP;
+
+       if (mlx5_core_is_mp_master(priv->mdev))
+               mlx5_devcom_send_event(priv->devcom, MPV_DEVCOM_MASTER_UP,
+                                      MPV_DEVCOM_MASTER_UP, priv);
+
+       return 0;
+}
+
+static void mlx5e_devcom_cleanup_mpv(struct mlx5e_priv *priv)
+{
+       mlx5_devcom_unregister_component(priv->devcom);
+}
+
 static int blocking_event(struct notifier_block *nb, unsigned long event, void *data)
 {
        struct mlx5e_priv *priv = container_of(nb, struct mlx5e_priv, blocking_events_nb);
@@ -192,6 +224,13 @@ static int blocking_event(struct notifier_block *nb, unsigned long event, void *
                        return NOTIFY_BAD;
                }
                break;
+       case MLX5_DRIVER_EVENT_AFFILIATION_DONE:
+               if (mlx5e_devcom_init_mpv(priv, data))
+                       return NOTIFY_BAD;
+               break;
+       case MLX5_DRIVER_EVENT_AFFILIATION_REMOVED:
+               mlx5e_devcom_cleanup_mpv(priv);
+               break;
        default:
                return NOTIFY_DONE;
        }
index 8389ac0af708e96e5b6a44db1268005b375c1bf6..8220d180e33c96d9f751194e9e6826f08b7e6ba2 100644 (file)
@@ -8,6 +8,7 @@
 
 enum mlx5_devcom_component {
        MLX5_DEVCOM_ESW_OFFLOADS,
+       MLX5_DEVCOM_MPV,
        MLX5_DEVCOM_NUM_COMPONENTS,
 };