ACPI: SPCR: Add support for DBG2 RISC-V SBI port subtype

Commit 4aca2bef90bd1296 ("ACPICA: Headers: Add RISC-V SBI Subtype to
DBG2") added the definition of ACPI_DBG2_RISCV_SBI_CON.

Continue to implement its function so that the parameters of UART can
be configured correctly.

Subsequent calls to setup_earlycon() will reuse the earlycon based on
SBI.

Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
Reviewed-by: Guo Ren (Alibaba Damo Academy) <guoren@kernel.org>
Link: https://patch.msgid.link/20250910094136.4423-1-cp0613@linux.alibaba.com
[ rjw: Changelog edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
index cd36a97b0ea2c7e31bb0a72501c0ee938b163f30..208d6bbc65e0378d3d4d0cc7281f8000f8744908 100644 (file)
--- a/drivers/acpi/spcr.c
+++ b/drivers/acpi/spcr.c
@@ -141,6 +141,9 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
        case ACPI_DBG2_16550_NVIDIA:
                uart = "uart";
                break;
+       case ACPI_DBG2_RISCV_SBI_CON:
+               uart = "sbi";
+               break;
        default:
                err = -ENOENT;
                goto done;