]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/vmwgfx: add support for updating only offsets of constant buffers
authorRoland Scheidegger <sroland@vmware.com>
Mon, 6 Dec 2021 17:26:18 +0000 (12:26 -0500)
committerZack Rusin <zackr@vmware.com>
Thu, 9 Dec 2021 18:16:30 +0000 (13:16 -0500)
This adds support for the
SVGA_3D_CMD_DX_SET_VS/PS/GS/HS/DS/CS_CONSTANT_BUFFER_OFFSET commands (which only update
the offset, but don't rebind the buffer), which saves some overhead.

Signed-off-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Signed-off-by: Zack Rusin <zackr@vmware.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211206172620.3139754-11-zack@kde.org
drivers/gpu/drm/vmwgfx/vmwgfx_binding.c
drivers/gpu/drm/vmwgfx/vmwgfx_binding.h
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c

index 9aa69ba856702b7a0a4ec5ce4205bcbdabd89979..ae2de914eb890edde9fe2988f042a8fcb99453e0 100644 (file)
@@ -353,6 +353,27 @@ void vmw_binding_add(struct vmw_ctx_binding_state *cbs,
        INIT_LIST_HEAD(&loc->res_list);
 }
 
+/**
+ * vmw_binding_cb_offset_update: Update the offset of a cb binding
+ *
+ * @cbs: Pointer to the context binding state tracker.
+ * @shader_slot: The shader slot of the binding.
+ * @slot: The slot of the binding.
+ * @offsetInBytes: The new offset of the binding.
+ *
+ * Updates the offset of an existing cb binding in the context binding
+ * state structure @cbs.
+ */
+void vmw_binding_cb_offset_update(struct vmw_ctx_binding_state *cbs,
+                                 u32 shader_slot, u32 slot, u32 offsetInBytes)
+{
+       struct vmw_ctx_bindinfo *loc =
+               vmw_binding_loc(cbs, vmw_ctx_binding_cb, shader_slot, slot);
+       struct vmw_ctx_bindinfo_cb *loc_cb =
+               (struct vmw_ctx_bindinfo_cb *)((u8 *) loc);
+       loc_cb->offset = offsetInBytes;
+}
+
 /**
  * vmw_binding_add_uav_index - Add UAV index for tracking.
  * @cbs: Pointer to the context binding state tracker.
index 6b1b234d12a1029170c4b5f4e7b11f3c2bee852e..85b90f7d398dc1f791cb2b961665ea4d54c30dc4 100644 (file)
@@ -217,6 +217,8 @@ struct vmw_ctx_bindinfo_so {
 extern void vmw_binding_add(struct vmw_ctx_binding_state *cbs,
                            const struct vmw_ctx_bindinfo *ci,
                            u32 shader_slot, u32 slot);
+extern void vmw_binding_cb_offset_update(struct vmw_ctx_binding_state *cbs,
+                                        u32 shader_slot, u32 slot, u32 offsetInBytes);
 extern void vmw_binding_add_uav_index(struct vmw_ctx_binding_state *cbs,
                                      uint32 slot, uint32 splice_index);
 extern void
index fd204fe2c68fe110a4100727207c17204a42cb44..44ca23b0ea4eede7b33d1b26a087e0e8abe199bc 100644 (file)
@@ -2163,6 +2163,44 @@ vmw_cmd_dx_set_single_constant_buffer(struct vmw_private *dev_priv,
        return 0;
 }
 
+/**
+ * vmw_cmd_dx_set_constant_buffer_offset - Validate
+ * SVGA_3D_CMD_DX_SET_VS/PS/GS/HS/DS/CS_CONSTANT_BUFFER_OFFSET command.
+ *
+ * @dev_priv: Pointer to a device private struct.
+ * @sw_context: The software context being used for this batch.
+ * @header: Pointer to the command header in the command stream.
+ */
+static int
+vmw_cmd_dx_set_constant_buffer_offset(struct vmw_private *dev_priv,
+                                     struct vmw_sw_context *sw_context,
+                                     SVGA3dCmdHeader *header)
+{
+       VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetConstantBufferOffset);
+
+       struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
+       u32 shader_slot;
+
+       if (!has_sm5_context(dev_priv))
+               return -EINVAL;
+
+       if (!ctx_node)
+               return -EINVAL;
+
+       cmd = container_of(header, typeof(*cmd), header);
+       if (cmd->body.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) {
+               VMW_DEBUG_USER("Illegal const buffer slot %u.\n",
+                              (unsigned int) cmd->body.slot);
+               return -EINVAL;
+       }
+
+       shader_slot = cmd->header.id - SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET;
+       vmw_binding_cb_offset_update(ctx_node->staged, shader_slot,
+                                    cmd->body.slot, cmd->body.offsetInBytes);
+
+       return 0;
+}
+
 /**
  * vmw_cmd_dx_set_shader_res - Validate SVGA_3D_CMD_DX_SET_SHADER_RESOURCES
  * command
@@ -3526,6 +3564,24 @@ static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
        VMW_CMD_DEF(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
                    &vmw_cmd_dx_transfer_from_buffer,
                    true, false, true),
+       VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET,
+                   &vmw_cmd_dx_set_constant_buffer_offset,
+                   true, false, true),
+       VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET,
+                   &vmw_cmd_dx_set_constant_buffer_offset,
+                   true, false, true),
+       VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET,
+                   &vmw_cmd_dx_set_constant_buffer_offset,
+                   true, false, true),
+       VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET,
+                   &vmw_cmd_dx_set_constant_buffer_offset,
+                   true, false, true),
+       VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET,
+                   &vmw_cmd_dx_set_constant_buffer_offset,
+                   true, false, true),
+       VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET,
+                   &vmw_cmd_dx_set_constant_buffer_offset,
+                   true, false, true),
        VMW_CMD_DEF(SVGA_3D_CMD_INTRA_SURFACE_COPY, &vmw_cmd_intra_surface_copy,
                    true, false, true),