}
/* First level PGD is in GPA, must be supported by the second level */
- if ((unsigned long long)gpgd > domain->max_addr) {
+ if ((uintptr_t)gpgd > domain->max_addr) {
dev_err_ratelimited(dev,
- "Guest PGD %llx not supported, max %llx\n",
- (unsigned long long)gpgd, domain->max_addr);
+ "Guest PGD %lx not supported, max %llx\n",
+ (uintptr_t)gpgd, domain->max_addr);
return -EINVAL;
}
- pasid_set_flptr(pte, (u64)gpgd);
+ pasid_set_flptr(pte, (uintptr_t)gpgd);
ret = intel_pasid_setup_bind_data(iommu, pte, pasid_data);
if (ret)
* call the nested mode setup function here.
*/
spin_lock(&iommu->lock);
- ret = intel_pasid_setup_nested(iommu, dev, (pgd_t *)data->gpgd,
+ ret = intel_pasid_setup_nested(iommu, dev,
+ (pgd_t *)(uintptr_t)data->gpgd,
data->hpasid, &data->vtd, dmar_domain,
data->addr_width);
spin_unlock(&iommu->lock);