x86: correct .insn with opcode extension and VEX/XOP/EVEX encoding

When VexVVVV handling was re-worked, .insn broke: When an opcode
extension is in use, VexVVVV_DST needs using now, as ModR/M.reg is
already occupied, matching what c8866e3ec5e2 ("x86: Drop using
extension_opcode to encode vvvv register") did.

While adding (bad) POP2 forms, also slightly adjust existing ones:
No need to use XMM registers, and no need to specify %r8 when really
%rax is meant twice (EVEX.vvvv not really being the culprit there, or
else EVEX.V' would also have needed mentioning).

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 87a1d0cf27036fd4cd858e8a5dfe7a9d28eff376..4e3af8941aa23c7232bf6f7728fcd086fe975a83 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -13057,7 +13057,8 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
        case 3:
          if (pp.encoding != encoding_default)
            {
-             i.tm.opcode_modifier.vexvvvv = VexVVVV_SRC1;
+             i.tm.opcode_modifier.vexvvvv = i.tm.extension_opcode == None
+                                            ? VexVVVV_SRC1 : VexVVVV_DST;
              break;
            }
          /* Fall through.  */

diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
index 7c2efb08d711ccd2d7415feb9b613aa3183ec186..667e6f2713015f6cae9ce1515b9cd77d4dbf6184 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d
@@ -34,9 +34,12 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:[   ]+04 08[        ]+.*
 [      ]*[a-f0-9]+:[   ]+62 f4 3c 08 8f[       ]+\(bad\)
 [      ]*[a-f0-9]+:[   ]+c7[   ]+.*
-[      ]*[a-f0-9]+:[   ]+62 74 7c 18 8f c0[    ]+pop2   %rax,\(bad\)
+[      ]*[a-f0-9]+:[   ]+62 f4 7c 18 8f c0[    ]+pop2   %rax,\(bad\)
 [      ]*[a-f0-9]+:[   ]+62 d4 24 18 8f[       ]+\(bad\)
 [      ]*[a-f0-9]+:[   ]+c3[   ]+.*
+[      ]*[a-f0-9]+:[   ]+62 f4 5c 18 8f[       ]+\(bad\)
+[      ]*[a-f0-9]+:[   ]+c3[   ]+.*
+[      ]*[a-f0-9]+:[   ]+62 f4 7c 18 8f c4[    ]+pop2   %rsp,\(bad\)
 [      ]*[a-f0-9]+:[   ]+62 fc 7d 0c 60 c7[    ]+movbe  \{bad-nf\},%r23w,%ax
 [      ]*[a-f0-9]+:[   ]+62 fc 79 08 60[       ]+\(bad\)
 [      ]*[a-f0-9]+:[   ]+c7[    ]+.*

diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
index 959e4e1fb436c6ad159ace084bbdfffae8ed8008..7b2df4b36ea71d058f5d00532eb357b047b68723 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s
@@ -44,11 +44,17 @@ _start:
        # pop2 %rdi, %r8 set EVEX.ND=0.
        .byte 0x62, 0xf4, 0x3c, 0x08, 0x8f, 0xc7
 
-       # pop2 %rax, %r8 set EVEX.vvvv = 1111.
-       .insn EVEX.L0.M4.W0 0x8f,  %rax, {rn-sae},%r8
+       # pop2 %rax, %rax
+       .insn EVEX.L0.NP.M4.W0 0x8f/0, %rax, {sae}, %rax
 
        # pop2 %r11, %r11
-       .insn EVEX.L0.NP.M4.W0 0x8f/0, {sae}, %xmm11, %xmm11
+       .insn EVEX.L0.NP.M4.W0 0x8f/0, %r11, {sae}, %r11
+
+       # pop2 %rbx, %rsp
+       .insn EVEX.L0.NP.M4.W0 0x8f/0, %rbx, {sae}, %rsp
+
+       # pop2 %rsp, %rax
+       .insn EVEX.L0.NP.M4.W0 0x8f/0, %rsp, {sae}, %rax
 
        #EVEX_MAP4 movbe %r18w,%ax set EVEX.nf = 1.
        .insn EVEX.L0.66.M12.W0 0x60, %di, %ax {%k4}